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ifq: Factor out if_classq from altq_classq and use it for default ifq.
[dragonfly.git] / sys / dev / disk / stg / tmc18c30.c
blobd3c49c5f40c47f9dfb1b0a32b9c9ca760ae55f0d
1 /* $FreeBSD: src/sys/dev/stg/tmc18c30.c,v 1.1.2.5 2001/12/17 13:30:19 non Exp $ */
2 /* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */
3 /* $NetBSD$ */
4
5 #define STG_DEBUG
6 #define STG_STATICS
7 #define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT)
8
9 /*
10 * [NetBSD for NEC PC-98 series]
11 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
12 * NetBSD/pc98 porting staff. All rights reserved.
13 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
14 * Naofumi HONDA. All rights reserved.
15 * Copyright (c) 1996, 1997, 1998, 1999
16 * Kouichi Matsuda. All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 * 3. The name of the author may not be used to endorse or promote products
27 * derived from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41 #include "opt_ddb.h"
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/buf.h>
47 #include <sys/queue.h>
48 #include <sys/malloc.h>
49 #include <sys/errno.h>
50 #include <sys/bus.h>
51 #include <sys/thread2.h>
52
53 #include <machine/clock.h>
54 #include <machine/cpu.h>
55
56 #include <bus/cam/scsi/scsi_low.h>
57 #include "tmc18c30reg.h"
58 #include "tmc18c30var.h"
59
60 /***************************************************
61 * USER SETTINGS
62 ***************************************************/
63 /* DEVICE CONFIGURATION FLAGS (MINOR)
64 *
65 * 0x01 DISCONECT OFF
66 * 0x02 PARITY LINE OFF
67 * 0x04 IDENTIFY MSG OFF ( = single lun)
68 * 0x08 SYNC TRANSFER OFF
69 */
70 /* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */
71
72 /* For the 512 fifo type: change below */
73 #define TMC18C30_FIFOSZ 0x800
74 #define TMC18C30_FCBSZ 0x200
75 #define TMC18C50_FIFOSZ 0x2000
76 #define TMC18C50_FCBSZ 0x400
77
78 #define STG_MAX_DATA_SIZE (64 * 1024)
79 #define STG_DELAY_MAX (2 * 1000 * 1000)
80 #define STG_DELAY_INTERVAL (1)
81 #define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000)
82
83 /***************************************************
84 * PARAMS
85 ***************************************************/
86 #define STG_NTARGETS 8
87 #define STG_NLUNS 8
88
89 /***************************************************
90 * DEBUG
91 ***************************************************/
92 #ifdef STG_DEBUG
93 int stg_debug;
94 #endif /* STG_DEBUG */
95
96 #ifdef STG_STATICS
97 struct stg_statics {
98 int arbit_fail_0;
99 int arbit_fail_1;
100 int disconnect;
101 int reselect;
102 } stg_statics;
103 #endif /* STG_STATICS */
104
105 /***************************************************
106 * IO control flags
107 ***************************************************/
108 #define STG_FIFO_INTERRUPTS 0x0001
109 #define STG_WAIT_FOR_SELECT 0x0100
110
111 int stg_io_control = STG_IO_CONTROL_FLAGS;
112
113 /**************************************************************
114 * DECLARE
115 **************************************************************/
116 /* static */
117 static void stg_pio_read (struct stg_softc *, struct targ_info *, u_int);
118 static void stg_pio_write (struct stg_softc *, struct targ_info *, u_int);
119 static int stg_xfer (struct stg_softc *, u_int8_t *, int, int, int);
120 static int stg_msg (struct stg_softc *, struct targ_info *, u_int);
121 static int stg_reselected (struct stg_softc *);
122 static int stg_disconnected (struct stg_softc *, struct targ_info *);
123 static __inline void stg_pdma_end (struct stg_softc *, struct targ_info *);
124 static int stghw_select_targ_wait (struct stg_softc *, int);
125 static int stghw_check (struct stg_softc *);
126 static void stghw_init (struct stg_softc *);
127 static int stg_negate_signal (struct stg_softc *, u_int8_t, u_char *);
128 static int stg_expect_signal (struct stg_softc *, u_int8_t, u_int8_t);
129 static int stg_world_start (struct stg_softc *, int);
130 static int stghw_start_selection (struct stg_softc *sc, struct slccb *);
131 static void stghw_bus_reset (struct stg_softc *);
132 static void stghw_attention (struct stg_softc *);
133 static int stg_target_nexus_establish (struct stg_softc *);
134 static int stg_lun_nexus_establish (struct stg_softc *);
135 static int stg_ccb_nexus_establish (struct stg_softc *);
136 static int stg_targ_init (struct stg_softc *, struct targ_info *, int);
137 static __inline void stghw_bcr_write_1 (struct stg_softc *, u_int8_t);
138 static int stg_timeout (struct stg_softc *);
139 static void stg_selection_done_and_expect_msgout (struct stg_softc *);
140
141 struct scsi_low_funcs stgfuncs = {
142 SC_LOW_INIT_T stg_world_start,
143 SC_LOW_BUSRST_T stghw_bus_reset,
144 SC_LOW_TARG_INIT_T stg_targ_init,
145 SC_LOW_LUN_INIT_T NULL,
146
147 SC_LOW_SELECT_T stghw_start_selection,
148 SC_LOW_NEXUS_T stg_lun_nexus_establish,
149 SC_LOW_NEXUS_T stg_ccb_nexus_establish,
150
151 SC_LOW_ATTEN_T stghw_attention,
152 SC_LOW_MSG_T stg_msg,
153
154 SC_LOW_TIMEOUT_T stg_timeout,
155 SC_LOW_POLL_T stgintr,
156
157 NULL,
158 };
159
160 /****************************************************
161 * hwfuncs
162 ****************************************************/
163 static __inline void
164 stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv)
165 {
166
167 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
168 sc->sc_busimg = bcv;
169 }
170
171 static int
172 stghw_check(struct stg_softc *sc)
173 {
174 struct scsi_low_softc *slp = &sc->sc_sclow;
175 bus_space_tag_t iot = sc->sc_iot;
176 bus_space_handle_t ioh = sc->sc_ioh;
177 u_int fcbsize, fcb;
178 u_int16_t lsb, msb;
179
180 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
181 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
182 switch (msb << 8 | lsb)
183 {
184 case 0x6127:
185 /* TMCCHIP_1800 not supported. (it's my policy) */
186 sc->sc_chip = TMCCHIP_1800;
187 return EINVAL;
188
189 case 0x60e9:
190 if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
191 {
192 sc->sc_chip = TMCCHIP_18C30;
193 sc->sc_fsz = TMC18C30_FIFOSZ;
194 fcbsize = TMC18C30_FCBSZ;
195 }
196 else
197 {
198 sc->sc_chip = TMCCHIP_18C50;
199 sc->sc_fsz = TMC18C50_FIFOSZ;
200 fcbsize = TMC18C50_FCBSZ;
201 }
202 break;
203
204 default:
205 sc->sc_chip = TMCCHIP_UNK;
206 return ENODEV;
207 }
208
209 sc->sc_fcRinit = FCTL_INTEN;
210 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
211
212 if (slp->sl_cfgflags & CFG_NOATTEN)
213 sc->sc_imsg = 0;
214 else
215 sc->sc_imsg = BCTL_ATN;
216 sc->sc_busc = BCTL_BUSEN;
217
218 sc->sc_wthold = fcbsize + 256;
219 sc->sc_rthold = fcbsize - 256;
220 sc->sc_maxwsize = sc->sc_fsz;
221
222 fcb = fcbsize / (sc->sc_fsz / 16);
223 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb;
224 return 0;
225 }
226
227 static void
228 stghw_init(struct stg_softc *sc)
229 {
230 bus_space_tag_t iot = sc->sc_iot;
231 bus_space_handle_t ioh = sc->sc_ioh;
232
233 bus_space_write_1(iot, ioh, tmc_ictl, 0);
234 stghw_bcr_write_1(sc, BCTL_BUSFREE);
235 bus_space_write_1(iot, ioh, tmc_fctl,
236 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
237 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
238 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
239
240 bus_space_write_1(iot, ioh, tmc_ssctl, 0);
241 }
242
243 static int
244 stg_targ_init(struct stg_softc *sc, struct targ_info *ti, int action)
245 {
246 struct stg_targ_info *sti = (void *) ti;
247
248 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
249 {
250 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
251 ti->ti_maxsynch.period = 0;
252 ti->ti_maxsynch.offset = 0;
253 sti->sti_reg_synch = 0;
254 }
255 return 0;
256 }
257
258 /****************************************************
259 * scsi low interface
260 ****************************************************/
261 static void
262 stghw_attention(struct stg_softc *sc)
263 {
264
265 sc->sc_busc |= BCTL_ATN;
266 sc->sc_busimg |= BCTL_ATN;
267 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
268 SCSI_LOW_DELAY(10);
269 }
270
271 static void
272 stghw_bus_reset(struct stg_softc *sc)
273 {
274 bus_space_tag_t iot = sc->sc_iot;
275 bus_space_handle_t ioh = sc->sc_ioh;
276
277 bus_space_write_1(iot, ioh, tmc_ictl, 0);
278 bus_space_write_1(iot, ioh, tmc_fctl, 0);
279 stghw_bcr_write_1(sc, BCTL_RST);
280 SCSI_LOW_DELAY(100000);
281 stghw_bcr_write_1(sc, BCTL_BUSFREE);
282 }
283
284 static int
285 stghw_start_selection(struct stg_softc *sc, struct slccb *cb)
286 {
287 bus_space_tag_t iot = sc->sc_iot;
288 bus_space_handle_t ioh = sc->sc_ioh;
289 struct targ_info *ti = cb->ti;
290 u_int8_t stat;
291
292 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
293 sc->sc_dataout_timeout = 0;
294 sc->sc_ubf_timeout = 0;
295 stghw_bcr_write_1(sc, BCTL_BUSFREE);
296 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
297
298 crit_enter();
299 stat = bus_space_read_1(iot, ioh, tmc_astat);
300 if ((stat & ASTAT_INT) != 0)
301 {
302 crit_exit();
303 return SCSI_LOW_START_FAIL;
304 }
305
306 bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
307 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
308 crit_exit();
309
310 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
311 return SCSI_LOW_START_OK;
312 }
313
314 static int
315 stg_world_start(struct stg_softc *sc, int fdone)
316 {
317 struct scsi_low_softc *slp = &sc->sc_sclow;
318 int error;
319
320 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
321 sc->sc_fcRinit |= FCTL_PARENB;
322 else
323 sc->sc_fcRinit &= ~FCTL_PARENB;
324
325 if ((error = stghw_check(sc)) != 0)
326 return error;
327
328 stghw_init(sc);
329 scsi_low_bus_reset(slp);
330 stghw_init(sc);
331
332 SOFT_INTR_REQUIRED(slp);
333 return 0;
334 }
335
336 static int
337 stg_msg(struct stg_softc *sc, struct targ_info *ti, u_int msg)
338 {
339 bus_space_tag_t iot = sc->sc_iot;
340 bus_space_handle_t ioh = sc->sc_ioh;
341 struct stg_targ_info *sti = (void *) ti;
342 u_int period;
343
344 if ((msg & SCSI_LOW_MSG_WIDE) != 0)
345 {
346 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
347 {
348 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
349 return EINVAL;
350 }
351 return 0;
352 }
353
354 if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
355 return 0;
356
357 period = ti->ti_maxsynch.period;
358 period = period << 2;
359 if (period >= 200)
360 {
361 sti->sti_reg_synch = (period - 200) / 50;
362 if (period % 50)
363 sti->sti_reg_synch ++;
364 sti->sti_reg_synch |= SSCTL_SYNCHEN;
365 }
366 else if (period >= 100)
367 {
368 sti->sti_reg_synch = (period - 100) / 50;
369 if (period % 50)
370 sti->sti_reg_synch ++;
371 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
372 }
373 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
374 return 0;
375 }
376
377 /**************************************************************
378 * General probe attach
379 **************************************************************/
380 int
381 stgprobesubr(bus_space_tag_t iot, bus_space_handle_t ioh, u_int dvcfg)
382 {
383 u_int16_t lsb, msb;
384
385 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
386 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
387 switch (msb << 8 | lsb)
388 {
389 default:
390 return 0;
391 case 0x6127:
392 /* not support! */
393 return 0;
394 case 0x60e9:
395 return 1;
396 }
397 return 0;
398 }
399
400 int
401 stgprint(void *aux, const char *name)
402 {
403
404 if (name != NULL)
405 kprintf("%s: scsibus ", name);
406 return UNCONF;
407 }
408
409 void
410 stgattachsubr(struct stg_softc *sc)
411 {
412 struct scsi_low_softc *slp = &sc->sc_sclow;
413
414 kprintf("\n");
415
416 sc->sc_idbit = (1 << slp->sl_hostid);
417 slp->sl_funcs = &stgfuncs;
418 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
419
420 slp->sl_flags |= HW_READ_PADDING;
421 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */
422
423 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS,
424 sizeof(struct stg_targ_info), 0);
425 }
426
427 /**************************************************************
428 * PDMA functions
429 **************************************************************/
430 static __inline void
431 stg_pdma_end(struct stg_softc *sc, struct targ_info *ti)
432 {
433 struct scsi_low_softc *slp = &sc->sc_sclow;
434 bus_space_tag_t iot = sc->sc_iot;
435 bus_space_handle_t ioh = sc->sc_ioh;
436 struct slccb *cb = slp->sl_Qnexus;
437 u_int len, tres;
438
439 slp->sl_flags &= ~HW_PDMASTART;
440 sc->sc_icinit &= ~ICTL_FIFO;
441 sc->sc_dataout_timeout = 0;
442
443 if (cb == NULL)
444 {
445 slp->sl_error |= PDMAERR;
446 goto out;
447 }
448
449 if (ti->ti_phase == PH_DATA)
450 {
451 len = bus_space_read_2(iot, ioh, tmc_fdcnt);
452 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
453 {
454 if (len != 0)
455 {
456 tres = len + slp->sl_scp.scp_datalen;
457 if (tres <= (u_int) cb->ccb_scp.scp_datalen)
458 {
459 slp->sl_scp.scp_data -= len;
460 slp->sl_scp.scp_datalen = tres;
461 }
462 else
463 {
464 slp->sl_error |= PDMAERR;
465 kprintf("%s len %x >= datalen %x\n",
466 slp->sl_xname,
467 len, slp->sl_scp.scp_datalen);
468 }
469 }
470 }
471 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
472 {
473 if (len != 0)
474 {
475 slp->sl_error |= PDMAERR;
476 kprintf("%s: len %x left in fifo\n",
477 slp->sl_xname, len);
478 }
479 }
480 scsi_low_data_finish(slp);
481 }
482 else
483 {
484
485 kprintf("%s data phase miss\n", slp->sl_xname);
486 slp->sl_error |= PDMAERR;
487 }
488
489 out:
490 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
491 }
492
493 static void
494 stg_pio_read(struct stg_softc *sc, struct targ_info *ti, u_int thold)
495 {
496 struct scsi_low_softc *slp = &sc->sc_sclow;
497 bus_space_tag_t iot = sc->sc_iot;
498 bus_space_handle_t ioh = sc->sc_ioh;
499 struct sc_p *sp = &slp->sl_scp;
500 int tout;
501 u_int res;
502 u_int8_t stat;
503
504 if ((slp->sl_flags & HW_PDMASTART) == 0)
505 {
506 bus_space_write_1(iot, ioh, tmc_fctl,
507 sc->sc_fcRinit | FCTL_FIFOEN);
508 slp->sl_flags |= HW_PDMASTART;
509 }
510
511 tout = sc->sc_tmaxcnt;
512 while (tout -- > 0)
513 {
514 if (thold > 0)
515 {
516 crit_enter();
517 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
518 if (res < thold)
519 {
520 bus_space_write_1(iot, ioh, tmc_ictl,
521 sc->sc_icinit);
522 crit_exit();
523 break;
524 }
525 crit_exit();
526 }
527 else
528 {
529 stat = bus_space_read_1(iot, ioh, tmc_bstat);
530 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
531 if (res == 0)
532 {
533 if ((stat & PHASE_MASK) != DATA_IN_PHASE)
534 break;
535 if (sp->scp_datalen <= 0)
536 break;
537 SCSI_LOW_DELAY(1);
538 continue;
539 }
540 }
541
542 /* The assumtion res != 0 is valid here */
543 if (res > sp->scp_datalen)
544 {
545 if (res == (u_int) -1)
546 break;
547
548 slp->sl_error |= PDMAERR;
549 if ((slp->sl_flags & HW_READ_PADDING) == 0)
550 {
551 kprintf("%s: read padding required\n",
552 slp->sl_xname);
553 break;
554 }
555
556 sp->scp_datalen = 0;
557 if (res > STG_MAX_DATA_SIZE)
558 res = STG_MAX_DATA_SIZE;
559 while (res -- > 0)
560 {
561 (void) bus_space_read_1(iot, ioh, tmc_rfifo);
562 }
563 continue;
564 }
565
566 sp->scp_datalen -= res;
567 if (res & 1)
568 {
569 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
570 sp->scp_data ++;
571 res --;
572 }
573
574 bus_space_read_multi_2(iot, ioh, tmc_rfifo,
575 (u_int16_t *) sp->scp_data, res >> 1);
576 sp->scp_data += res;
577 }
578
579 if (tout <= 0)
580 kprintf("%s: pio read timeout\n", slp->sl_xname);
581 }
582
583 static void
584 stg_pio_write(struct stg_softc *sc, struct targ_info *ti, u_int thold)
585 {
586 struct scsi_low_softc *slp = &sc->sc_sclow;
587 bus_space_tag_t iot = sc->sc_iot;
588 bus_space_handle_t ioh = sc->sc_ioh;
589 struct sc_p *sp = &slp->sl_scp;
590 u_int res;
591 int tout;
592 u_int8_t stat;
593
594 if ((slp->sl_flags & HW_PDMASTART) == 0)
595 {
596 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
597 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
598 bus_space_write_1(iot, ioh, tmc_fctl, stat);
599 slp->sl_flags |= HW_PDMASTART;
600 }
601
602 tout = sc->sc_tmaxcnt;
603 while (tout -- > 0)
604 {
605 stat = bus_space_read_1(iot, ioh, tmc_bstat);
606 if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
607 break;
608
609 if (sp->scp_datalen <= 0)
610 {
611 if (sc->sc_dataout_timeout == 0)
612 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
613 break;
614 }
615
616 if (thold > 0)
617 {
618 crit_enter();
619 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
620 if (res > thold)
621 {
622 bus_space_write_1(iot, ioh, tmc_ictl,
623 sc->sc_icinit);
624 crit_exit();
625 break;
626 }
627 crit_exit();
628 }
629 else
630 {
631 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
632 if (res > sc->sc_maxwsize / 2)
633 {
634 SCSI_LOW_DELAY(1);
635 continue;
636 }
637 }
638
639 if (res == (u_int) -1)
640 break;
641 res = sc->sc_maxwsize - res;
642 if (res > sp->scp_datalen)
643 res = sp->scp_datalen;
644
645 sp->scp_datalen -= res;
646 if ((res & 0x1) != 0)
647 {
648 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
649 sp->scp_data ++;
650 res --;
651 }
652
653 bus_space_write_multi_2(iot, ioh, tmc_wfifo,
654 (u_int16_t *) sp->scp_data, res >> 1);
655 sp->scp_data += res;
656 }
657
658 if (tout <= 0)
659 kprintf("%s: pio write timeout\n", slp->sl_xname);
660 }
661
662 static int
663 stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s)
664 {
665 struct scsi_low_softc *slp = &sc->sc_sclow;
666 bus_space_tag_t bst = sc->sc_iot;
667 bus_space_handle_t bsh = sc->sc_ioh;
668 int wc;
669 u_int8_t regv;
670
671 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
672 {
673 regv = bus_space_read_1(bst, bsh, tmc_bstat);
674 if (regv == (u_int8_t) -1)
675 return -1;
676 if ((regv & mask) == 0)
677 return 1;
678
679 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
680 }
681
682 kprintf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s);
683 return -1;
684 }
685
686 static int
687 stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask)
688 {
689 struct scsi_low_softc *slp = &sc->sc_sclow;
690 bus_space_tag_t bst = sc->sc_iot;
691 bus_space_handle_t bsh = sc->sc_ioh;
692 int wc;
693 u_int8_t ph;
694
695 phase &= PHASE_MASK;
696 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
697 {
698 ph = bus_space_read_1(bst, bsh, tmc_bstat);
699 if (ph == (u_int8_t) -1)
700 return -1;
701 if ((ph & PHASE_MASK) != phase)
702 return 0;
703 if ((ph & mask) != 0)
704 return 1;
705
706 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
707 }
708
709 kprintf("%s: stg_expect_signal timeout\n", slp->sl_xname);
710 return -1;
711 }
712
713 static int
714 stg_xfer(struct stg_softc *sc, u_int8_t *buf, int len, int phase,
715 int clear_atn)
716 {
717 bus_space_tag_t iot = sc->sc_iot;
718 bus_space_handle_t ioh = sc->sc_ioh;
719 int rv, ptr;
720
721 if (phase & BSTAT_IO)
722 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
723 else
724 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
725
726 for (ptr = 0; len > 0; len --)
727 {
728 rv = stg_expect_signal(sc, phase, BSTAT_REQ);
729 if (rv <= 0)
730 goto bad;
731
732 if (len == 1 && clear_atn != 0)
733 {
734 sc->sc_busc &= ~BCTL_ATN;
735 stghw_bcr_write_1(sc, sc->sc_busc);
736 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
737 }
738
739 if (phase & BSTAT_IO)
740 {
741 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
742 }
743 else
744 {
745 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
746 }
747
748 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
749 }
750
751 bad:
752 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
753 return len;
754 }
755
756 /**************************************************************
757 * disconnect & reselect (HW low)
758 **************************************************************/
759 static int
760 stg_reselected(struct stg_softc *sc)
761 {
762 struct scsi_low_softc *slp = &sc->sc_sclow;
763 bus_space_tag_t iot = sc->sc_iot;
764 bus_space_handle_t ioh = sc->sc_ioh;
765 int tout;
766 u_int sid;
767 u_int8_t regv;
768
769 if (slp->sl_selid != NULL)
770 {
771 /* XXX:
772 * Selection vs Reselection conflicts.
773 */
774 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
775 stghw_bcr_write_1(sc, BCTL_BUSFREE);
776 }
777 else if (slp->sl_Tnexus != NULL)
778 {
779 kprintf("%s: unexpected termination\n", slp->sl_xname);
780 stg_disconnected(sc, slp->sl_Tnexus);
781 }
782
783 /* XXX:
784 * We should ack the reselection as soon as possible,
785 * because the target would abort the current reselection seq
786 * due to reselection timeout.
787 */
788 tout = STG_DELAY_SELECT_POLLING_MAX;
789 while (tout -- > 0)
790 {
791 regv = bus_space_read_1(iot, ioh, tmc_bstat);
792 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
793 (BSTAT_IO | BSTAT_SEL))
794 {
795 SCSI_LOW_DELAY(1);
796 regv = bus_space_read_1(iot, ioh, tmc_bstat);
797 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
798 (BSTAT_IO | BSTAT_SEL))
799 goto reselect_start;
800 }
801 SCSI_LOW_DELAY(1);
802 }
803 kprintf("%s: reselction timeout I\n", slp->sl_xname);
804 return EJUSTRETURN;
805
806 reselect_start:
807 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
808 if ((sid & sc->sc_idbit) == 0)
809 {
810 /* not us */
811 return EJUSTRETURN;
812 }
813
814 bus_space_write_1(iot, ioh, tmc_fctl,
815 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
816 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
817 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
818
819 while (tout -- > 0)
820 {
821 regv = bus_space_read_1(iot, ioh, tmc_bstat);
822 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
823 goto reselected;
824 SCSI_LOW_DELAY(1);
825 }
826 kprintf("%s: reselction timeout II\n", slp->sl_xname);
827 return EJUSTRETURN;
828
829 reselected:
830 sid &= ~sc->sc_idbit;
831 sid = ffs(sid) - 1;
832 if (scsi_low_reselected(slp, sid) == NULL)
833 return EJUSTRETURN;
834
835 #ifdef STG_STATICS
836 stg_statics.reselect ++;
837 #endif /* STG_STATICS */
838 return EJUSTRETURN;
839 }
840
841 static int
842 stg_disconnected(struct stg_softc *sc, struct targ_info *ti)
843 {
844 struct scsi_low_softc *slp = &sc->sc_sclow;
845 bus_space_tag_t iot = sc->sc_iot;
846 bus_space_handle_t ioh = sc->sc_ioh;
847
848 /* clear bus status & fifo */
849 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
850 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
851 stghw_bcr_write_1(sc, BCTL_BUSFREE);
852 sc->sc_icinit &= ~ICTL_FIFO;
853 sc->sc_busc &= ~BCTL_ATN;
854 sc->sc_dataout_timeout = 0;
855 sc->sc_ubf_timeout = 0;
856
857 #ifdef STG_STATICS
858 stg_statics.disconnect ++;
859 #endif /* STG_STATICS */
860 scsi_low_disconnected(slp, ti);
861 return 1;
862 }
863
864 /**************************************************************
865 * SEQUENCER
866 **************************************************************/
867 static int
868 stg_target_nexus_establish(struct stg_softc *sc)
869 {
870 struct scsi_low_softc *slp = &sc->sc_sclow;
871 bus_space_tag_t iot = sc->sc_iot;
872 bus_space_handle_t ioh = sc->sc_ioh;
873 struct targ_info *ti = slp->sl_Tnexus;
874 struct stg_targ_info *sti = (void *) ti;
875
876 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
877 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
878 {
879 sc->sc_icinit |= ICTL_FIFO;
880 }
881 return 0;
882 }
883
884 static int
885 stg_lun_nexus_establish(struct stg_softc *sc)
886 {
887
888 return 0;
889 }
890
891 static int
892 stg_ccb_nexus_establish(struct stg_softc *sc)
893 {
894 struct scsi_low_softc *slp = &sc->sc_sclow;
895 struct slccb *cb = slp->sl_Qnexus;
896
897 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
898 return 0;
899 }
900
901 #define STGHW_SELECT_INTERVAL 10
902
903 static int
904 stghw_select_targ_wait(struct stg_softc *sc, int mu)
905 {
906 bus_space_tag_t iot = sc->sc_iot;
907 bus_space_handle_t ioh = sc->sc_ioh;
908
909 mu = mu / STGHW_SELECT_INTERVAL;
910 while (mu -- > 0)
911 {
912 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0)
913 {
914 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL);
915 continue;
916 }
917 SCSI_LOW_DELAY(1);
918 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0)
919 {
920 return 0;
921 }
922 }
923 return ENXIO;
924 }
925
926 static void
927 stg_selection_done_and_expect_msgout(struct stg_softc *sc)
928 {
929 struct scsi_low_softc *slp = &sc->sc_sclow;
930 bus_space_tag_t iot = sc->sc_iot;
931 bus_space_handle_t ioh = sc->sc_ioh;
932
933 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
934 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
935 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
936 SCSI_LOW_ASSERT_ATN(slp);
937 }
938
939 int
940 stgintr(void *arg)
941 {
942 struct stg_softc *sc = arg;
943 struct scsi_low_softc *slp = &sc->sc_sclow;
944 bus_space_tag_t iot = sc->sc_iot;
945 bus_space_handle_t ioh = sc->sc_ioh;
946 struct targ_info *ti;
947 struct buf *bp;
948 u_int derror, flags;
949 int len;
950 u_int8_t status, astatus, regv;
951
952 /*******************************************
953 * interrupt check
954 *******************************************/
955 if (slp->sl_flags & HW_INACTIVE)
956 return 0;
957
958 astatus = bus_space_read_1(iot, ioh, tmc_astat);
959 status = bus_space_read_1(iot, ioh, tmc_bstat);
960
961 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
962 return 0;
963
964 bus_space_write_1(iot, ioh, tmc_ictl, 0);
965 if (astatus & ASTAT_SCSIRST)
966 {
967 bus_space_write_1(iot, ioh, tmc_fctl,
968 sc->sc_fcRinit | FCTL_CLRFIFO);
969 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
970 bus_space_write_1(iot, ioh, tmc_ictl, 0);
971
972 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
973 "bus reset (power off?)");
974 return 1;
975 }
976
977 /*******************************************
978 * debug section
979 *******************************************/
980 #ifdef STG_DEBUG
981 if (stg_debug)
982 {
983 scsi_low_print(slp, NULL);
984 kprintf("%s: st %x ist %x\n\n", slp->sl_xname,
985 status, astatus);
986 #ifdef DDB
987 if (stg_debug > 1)
988 SCSI_LOW_DEBUGGER("stg");
989 #endif /* DDB */
990 }
991 #endif /* STG_DEBUG */
992
993 /*******************************************
994 * reselection & nexus
995 *******************************************/
996 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
997 {
998 if (stg_reselected(sc) == EJUSTRETURN)
999 goto out;
1000 }
1001
1002 if ((ti = slp->sl_Tnexus) == NULL)
1003 return 0;
1004
1005 derror = 0;
1006 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
1007 (sc->sc_fcRinit & FCTL_PARENB) != 0)
1008 {
1009 slp->sl_error |= PARITYERR;
1010 derror = SCSI_LOW_DATA_PE;
1011 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE)
1012 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0);
1013 else
1014 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
1015 }
1016
1017 /*******************************************
1018 * aribitration & selection
1019 *******************************************/
1020 switch (ti->ti_phase)
1021 {
1022 case PH_ARBSTART:
1023 if ((astatus & ASTAT_ARBIT) == 0)
1024 {
1025 #ifdef STG_STATICS
1026 stg_statics.arbit_fail_0 ++;
1027 #endif /* STG_STATICS */
1028 goto arb_fail;
1029 }
1030
1031 status = bus_space_read_1(iot, ioh, tmc_bstat);
1032 if ((status & BSTAT_IO) != 0)
1033 {
1034 /* XXX:
1035 * Selection vs Reselection conflicts.
1036 */
1037 #ifdef STG_STATICS
1038 stg_statics.arbit_fail_1 ++;
1039 #endif /* STG_STATICS */
1040 arb_fail:
1041 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1042 stghw_bcr_write_1(sc, BCTL_BUSFREE);
1043 scsi_low_arbit_fail(slp, slp->sl_Qnexus);
1044 goto out;
1045 }
1046
1047 /*
1048 * selection assert start.
1049 */
1050 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
1051 scsi_low_arbit_win(slp);
1052
1053 crit_enter();
1054 bus_space_write_1(iot, ioh, tmc_scsiid,
1055 sc->sc_idbit | (1 << ti->ti_id));
1056 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
1057 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
1058 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
1059 {
1060 /* selection abort delay 200 + 100 micro sec */
1061 if (stghw_select_targ_wait(sc, 300) == 0)
1062 {
1063 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1064 stg_selection_done_and_expect_msgout(sc);
1065 }
1066 }
1067 crit_exit();
1068 goto out;
1069
1070 case PH_SELSTART:
1071 if ((status & BSTAT_BSY) == 0)
1072 {
1073 /* selection timeout delay 250 ms */
1074 if (stghw_select_targ_wait(sc, 250 * 1000) != 0)
1075 {
1076 stg_disconnected(sc, ti);
1077 goto out;
1078 }
1079 }
1080
1081 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1082 stg_selection_done_and_expect_msgout(sc);
1083 goto out;
1084
1085 case PH_SELECTED:
1086 if ((status & BSTAT_REQ) == 0)
1087 goto out;
1088 stg_target_nexus_establish(sc);
1089 break;
1090
1091 case PH_RESEL:
1092 if ((status & BSTAT_REQ) == 0)
1093 goto out;
1094
1095 /* clear a busy line */
1096 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1097 stghw_bcr_write_1(sc, sc->sc_busc);
1098 stg_target_nexus_establish(sc);
1099 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
1100 {
1101 kprintf("%s: unexpected phase after reselect\n",
1102 slp->sl_xname);
1103 slp->sl_error |= FATALIO;
1104 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1105 goto out;
1106 }
1107 break;
1108 }
1109
1110 /*******************************************
1111 * data phase
1112 *******************************************/
1113 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0)
1114 {
1115 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1116 stg_pio_read(sc, ti, 0);
1117
1118 stg_pdma_end(sc, ti);
1119 }
1120
1121 /*******************************************
1122 * scsi seq
1123 *******************************************/
1124 switch (status & PHASE_MASK)
1125 {
1126 case COMMAND_PHASE:
1127 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0)
1128 break;
1129
1130 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1131 if (scsi_low_cmd(slp, ti) != 0)
1132 {
1133 scsi_low_attention(slp);
1134 }
1135
1136 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen,
1137 COMMAND_PHASE, 0) != 0)
1138 {
1139 kprintf("%s: CMDOUT short\n", slp->sl_xname);
1140 }
1141 break;
1142
1143 case DATA_OUT_PHASE:
1144 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1145 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1146 {
1147 scsi_low_attention(slp);
1148 }
1149
1150 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1151 stg_pio_write(sc, ti, sc->sc_wthold);
1152 else
1153 stg_pio_write(sc, ti, 0);
1154 break;
1155
1156 case DATA_IN_PHASE:
1157 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1158 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1159 {
1160 scsi_low_attention(slp);
1161 }
1162
1163 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1164 stg_pio_read(sc, ti, sc->sc_rthold);
1165 else
1166 stg_pio_read(sc, ti, 0);
1167 break;
1168
1169 case STATUS_PHASE:
1170 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ);
1171 if (regv <= 0)
1172 break;
1173
1174 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1175 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1176 if (scsi_low_statusin(slp, ti, regv | derror) != 0)
1177 {
1178 scsi_low_attention(slp);
1179 }
1180 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1181 {
1182 kprintf("%s: STATIN: data mismatch\n", slp->sl_xname);
1183 }
1184 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>");
1185 break;
1186
1187 case MESSAGE_OUT_PHASE:
1188 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0)
1189 break;
1190
1191 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1192 flags = (ti->ti_ophase != ti->ti_phase) ?
1193 SCSI_LOW_MSGOUT_INIT : 0;
1194 len = scsi_low_msgout(slp, ti, flags);
1195
1196 if (len > 1 && slp->sl_atten == 0)
1197 {
1198 scsi_low_attention(slp);
1199 }
1200
1201 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE,
1202 slp->sl_clear_atten) != 0)
1203 {
1204 kprintf("%s: MSGOUT short\n", slp->sl_xname);
1205 }
1206 else
1207 {
1208 if (slp->sl_msgphase >= MSGPH_ABORT)
1209 {
1210 stg_disconnected(sc, ti);
1211 }
1212 }
1213 break;
1214
1215 case MESSAGE_IN_PHASE:
1216 /* confirm phase and req signal */
1217 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0)
1218 break;
1219
1220 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1221
1222 /* read data with NOACK */
1223 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1224
1225 if (scsi_low_msgin(slp, ti, derror | regv) == 0)
1226 {
1227 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1228 {
1229 scsi_low_attention(slp);
1230 }
1231 }
1232
1233 /* read data with ACK */
1234 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1235 {
1236 kprintf("%s: MSGIN: data mismatch\n", slp->sl_xname);
1237 }
1238
1239 /* wait for the ack negated */
1240 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>");
1241
1242 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT)
1243 {
1244 stg_disconnected(sc, ti);
1245 }
1246 break;
1247
1248 case BUSFREE_PHASE:
1249 kprintf("%s: unexpected disconnect\n", slp->sl_xname);
1250 stg_disconnected(sc, ti);
1251 break;
1252
1253 default:
1254 slp->sl_error |= FATALIO;
1255 kprintf("%s: unknown phase bus %x intr %x\n",
1256 slp->sl_xname, status, astatus);
1257 break;
1258 }
1259
1260 out:
1261 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1262 return 1;
1263 }
1264
1265 static int
1266 stg_timeout(struct stg_softc *sc)
1267 {
1268 struct scsi_low_softc *slp = &sc->sc_sclow;
1269 bus_space_tag_t iot = sc->sc_iot;
1270 bus_space_handle_t ioh = sc->sc_ioh;
1271 int tout, count;
1272 u_int8_t status;
1273
1274 if (slp->sl_Tnexus == NULL)
1275 return 0;
1276
1277 status = bus_space_read_1(iot, ioh, tmc_bstat);
1278 if ((status & PHASE_MASK) == 0)
1279 {
1280 if (sc->sc_ubf_timeout ++ == 0)
1281 return 0;
1282
1283 kprintf("%s: unexpected bus free detected\n", slp->sl_xname);
1284 slp->sl_error |= FATALIO;
1285 scsi_low_print(slp, slp->sl_Tnexus);
1286 stg_disconnected(sc, slp->sl_Tnexus);
1287 return 0;
1288 }
1289
1290 switch (status & PHASE_MASK)
1291 {
1292 case DATA_OUT_PHASE:
1293 if (sc->sc_dataout_timeout == 0)
1294 break;
1295 if ((status & BSTAT_REQ) == 0)
1296 break;
1297 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1298 break;
1299 if ((-- sc->sc_dataout_timeout) > 0)
1300 break;
1301
1302 slp->sl_error |= PDMAERR;
1303 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1304 {
1305 kprintf("%s: write padding required\n",
1306 slp->sl_xname);
1307 break;
1308 }
1309
1310 bus_space_write_1(iot, ioh, tmc_ictl, 0);
1311
1312 tout = STG_DELAY_MAX;
1313 while (tout --)
1314 {
1315 status = bus_space_read_1(iot, ioh, tmc_bstat);
1316 if ((status & PHASE_MASK) != DATA_OUT_PHASE)
1317 break;
1318
1319 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1320 {
1321 SCSI_LOW_DELAY(1);
1322 continue;
1323 }
1324
1325 for (count = sc->sc_maxwsize; count > 0; count --)
1326 bus_space_write_1(iot, ioh, tmc_wfifo, 0);
1327 }
1328
1329 status = bus_space_read_1(iot, ioh, tmc_bstat);
1330 if ((status & PHASE_MASK) == DATA_OUT_PHASE)
1331 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1332
1333 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1334 break;
1335
1336 default:
1337 break;
1338 }
1339 return 0;
1340 }
DragonFly BSD