2 * DTC controller, taken from T128 driver by...
3 * Copyright 1993, Drew Eckhardt
5 * (Unix and Linux consulting and custom programming)
9 * DISTRIBUTION RELEASE 2.
11 * For more information, please consult
18 * SCSI Protocol Controller
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
32 int dtc_abort(Scsi_Cmnd
*);
33 int dtc_biosparam(Disk
*, kdev_t
, int*);
34 int dtc_detect(Scsi_Host_Template
*);
35 int dtc_queue_command(Scsi_Cmnd
*, void (*done
)(Scsi_Cmnd
*));
36 int dtc_reset(Scsi_Cmnd
*, unsigned int reset_flags
);
37 int dtc_proc_info (char *buffer
, char **start
, off_t offset
,
38 int length
, int hostno
, int inout
);
53 * I hadn't thought of this with the earlier drivers - but to prevent
54 * macro definition conflicts, we shouldn't define all of the internal
55 * macros when this is being used solely for the host stub.
58 #if defined(HOSTS_C) || defined(MODULE)
61 name: "DTC 3180/3280 ", \
63 queuecommand: dtc_queue_command, \
66 bios_param: dtc_biosparam, \
67 can_queue: CAN_QUEUE, \
69 sg_tablesize: SG_ALL, \
70 cmd_per_lun: CMD_PER_LUN , \
71 use_clustering: DISABLE_CLUSTERING}
77 #define NCR5380_implementation_fields \
78 volatile unsigned int base
80 #define NCR5380_local_declare() \
81 volatile unsigned int base
83 #define NCR5380_setup(instance) \
84 base = (unsigned int)(instance)->base
86 #define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
88 #define dbNCR5380_read(reg) \
89 (rval=readb(DTC_address(reg)), \
90 (((unsigned char) printk("DTC : read register %d at addr %08x is: %02x\n"\
91 , (reg), (int)DTC_address(reg), rval)), rval ) )
93 #define dbNCR5380_write(reg, value) do { \
94 printk("DTC : write %02x to register %d at address %08x\n", \
95 (value), (reg), (int)DTC_address(reg)); \
96 writeb(value, DTC_address(reg));} while(0)
99 #if !(DTCDEBUG & DTCDEBUG_TRANSFER)
100 #define NCR5380_read(reg) (readb(DTC_address(reg)))
101 #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
103 #define NCR5380_read(reg) (readb(DTC_address(reg)))
104 #define xNCR5380_read(reg) \
105 (((unsigned char) printk("DTC : read register %d at address %08x\n"\
106 , (reg), DTC_address(reg))), readb(DTC_address(reg)))
108 #define NCR5380_write(reg, value) do { \
109 printk("DTC : write %02x to register %d at address %08x\n", \
110 (value), (reg), (int)DTC_address(reg)); \
111 writeb(value, DTC_address(reg));} while(0)
114 #define NCR5380_intr dtc_intr
115 #define do_NCR5380_intr do_dtc_intr
116 #define NCR5380_queue_command dtc_queue_command
117 #define NCR5380_abort dtc_abort
118 #define NCR5380_reset dtc_reset
119 #define NCR5380_proc_info dtc_proc_info
122 1001 1100 0000 0000 */
124 #define DTC_IRQS 0x9c00
127 #endif /* else def HOSTS_C */
128 #endif /* ndef ASM */
129 #endif /* DTC3280_H */