From 58f68fb0cb8e9824256a115d1ebdc840c281e987 Mon Sep 17 00:00:00 2001 From: Dtrain Hsu Date: Tue, 5 Jul 2022 17:50:50 +0800 Subject: [PATCH] mb/google/brya/var/kinox: Configure TDC current Configure TDC current for VR domains. +-----------+-------+-------+---------+-------------+----------+ | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | | |(mOhms)|(mOhms)| (A) | (A) | (msec) | +-----------+-------+-------+---------+-------------+----------+ | IA | 2.8 | 2.8 | 80 | 43 | 28000 | +-----------+-------+-------+---------+-------------+----------+ | GT | 3.2 | 3.2 | 40 | 23 | 28000 | +-----------+-------+-------+---------+-------------+----------+ - IA TDC current from 20A to 43A. - GT TDC current from 20A to 23A. - Others comes from 'commit c6d716694272 ("soc/intel/alderlake: Configure the SKU specific parameters for VR domains")' BUG=b:237230877 TEST=Build and boot to Chrome OS Signed-off-by: Dtrain Hsu Change-Id: Ie9cf8975309b57b4189e2b50f37bd61ac0105e14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65659 Reviewed-by: Frank Wu Tested-by: build bot (Jenkins) --- .../google/brya/variants/kinox/overridetree.cb | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index bcf322b225..b76bf63836 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -10,6 +10,32 @@ chip soc/intel/alderlake # GPE configuration register "pmc_gpe0_dw1" = "GPP_H" + # +-----------+-------+-------+---------+-------------+----------+ + # | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | + # | |(mOhms)|(mOhms)| (A) | (A) | (msec) | + # +-----------+-------+-------+---------+-------------+----------+ + # | IA | 2.8 | 2.8 | 80 | 43 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + # | GT | 3.2 | 3.2 | 40 | 23 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + register "domain_vr_config[VR_DOMAIN_IA]" = "{ + .vr_config_enable = 1, + .ac_loadline = 280, + .dc_loadline = 280, + .icc_max = VR_CFG_AMP(80), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(43), + }" + + register "domain_vr_config[VR_DOMAIN_GT]" = "{ + .vr_config_enable = 1, + .ac_loadline = 320, + .dc_loadline = 320, + .icc_max = VR_CFG_AMP(40), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(23), + }" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- 2.11.4.GIT