From 3248db0e5a060271d7c1e87c4b687bec0b6c8d97 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Tue, 8 Feb 2022 22:34:16 -0700 Subject: [PATCH] util/spd_tools/spd_gen/lp5: Encode Optional SDRAM features ADL and Sabrina provide different advisories to encode Optional SDRAM features (byte indices 7 & 9). Encode those bytes as per the respective advisories. BUG=b:211510456 TEST=Generate the SPD binaries for Sabrina. Signed-off-by: Karthikeyan Ramasubramanian Change-Id: Icac8ae148458162768a919d9690d7bf96734e6c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61730 Tested-by: build bot (Jenkins) Reviewed-by: Reka Norman Reviewed-by: Tim Wawrzynczak Reviewed-by: Nick Vaccaro --- spd/lp5/set-1/spd-1.hex | 2 +- spd/lp5/set-1/spd-2.hex | 2 +- spd/lp5/set-1/spd-3.hex | 2 +- util/spd_tools/src/spd_gen/lp5.go | 103 +++++++++++++++++++++++++------------- 4 files changed, 72 insertions(+), 37 deletions(-) diff --git a/spd/lp5/set-1/spd-1.hex b/spd/lp5/set-1/spd-1.hex index 0a92764d43..343a471bea 100644 --- a/spd/lp5/set-1/spd-1.hex +++ b/spd/lp5/set-1/spd-1.hex @@ -1,4 +1,4 @@ -23 11 13 0E 15 1A 95 08 00 00 00 00 02 02 00 00 +23 11 13 0E 15 1A 95 18 00 40 00 00 02 02 00 00 00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/spd/lp5/set-1/spd-2.hex b/spd/lp5/set-1/spd-2.hex index 3156c92cdd..9c6f906f59 100644 --- a/spd/lp5/set-1/spd-2.hex +++ b/spd/lp5/set-1/spd-2.hex @@ -1,4 +1,4 @@ -23 11 13 0E 15 1A B5 08 00 00 00 00 0A 02 00 00 +23 11 13 0E 15 1A B5 18 00 40 00 00 0A 02 00 00 00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/spd/lp5/set-1/spd-3.hex b/spd/lp5/set-1/spd-3.hex index 550af0e6df..34cdcafe4f 100644 --- a/spd/lp5/set-1/spd-3.hex +++ b/spd/lp5/set-1/spd-3.hex @@ -1,4 +1,4 @@ -23 11 13 0E 16 22 95 08 00 00 00 00 02 02 00 00 +23 11 13 0E 16 22 95 18 00 40 00 00 02 02 00 00 00 00 0A 00 00 00 00 00 AA 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/util/spd_tools/src/spd_gen/lp5.go b/util/spd_tools/src/spd_gen/lp5.go index 1db5b8d52d..351aba3013 100644 --- a/util/spd_tools/src/spd_gen/lp5.go +++ b/util/spd_tools/src/spd_gen/lp5.go @@ -57,6 +57,8 @@ type LP5SPDAttribTableEntry struct { type LP5Set struct { SPDRevision byte + optionalFeatures byte + otherOptionalFeatures byte busWidthEncoding byte } @@ -74,6 +76,7 @@ const ( LP5SPDIndexAddressing = 5 LP5SPDIndexPackageType = 6 LP5SPDIndexOptionalFeatures = 7 + LP5SPDIndexOtherOptionalFeatures = 9 LP5SPDIndexModuleOrganization = 12 LP5SPDIndexBusWidth = 13 LP5SPDIndexTimebases = 17 @@ -132,15 +135,6 @@ const ( /* * From JEDEC spec: - * 5:4 (Maximum Activate Window) = 00 (8192 * tREFI) - * 3:0 (Maximum Activate Count) = 1000 (Unlimited MAC) - * Set to 0x08. - */ - LP5SPDValueOptionalFeatures = 0x08 - - - /* - * From JEDEC spec: * 3:2 (MTB) = 00 (0.125ns) * 1:0 (FTB) = 00 (1ps) * Set to 0x00. @@ -185,6 +179,13 @@ var LP5SetInfo = map[int]LP5Set{ 0: { SPDRevision: LP5SPDValueRevision1_0, /* + * From JEDEC spec: + * 5:4 (Maximum Activate Window) = 00 (8192 * tREFI) + * 3:0 (Maximum Activate Count) = 1000 (Unlimited MAC) + * Set to 0x08. + */ + optionalFeatures: 0x08, + /* * For ADL (as per advisory #616599): * 7:5 (Number of system channels) = 000 (1 channel always) * 4:3 (Bus width extension) = 00 (no ECC) @@ -197,6 +198,19 @@ var LP5SetInfo = map[int]LP5Set{ SPDRevision: LP5SPDValueRevision1_1, /* * For Sabrina (as per advisory b/211510456): + * 5:4 (Maximum Activate Window) = 01 (4096 * tREFI) + * 3:0 (Maximum Activate Count) = 1000 (Unlimited MAC) + * Set to 0x18. + */ + optionalFeatures: 0x18, + /* + * For Sabrina (as per advisory b/211510456): + * 7:6 (PPR) = 1 (Post Package Repair is supported) + * Set to 0x40. + */ + otherOptionalFeatures: 0x40, + /* + * For Sabrina (as per advisory b/211510456): * 7:5 (Number of system channels) = 000 (1 channel always) * 4:3 (Bus width extension) = 00 (no ECC) * 2:0 (Bus width) = 010 (x32 always) @@ -306,31 +320,32 @@ var LP5SpeedMbpsToSPDEncoding = map[int]LP5SpeedParams{ } var LP5SPDAttribTable = map[int]LP5SPDAttribTableEntry{ - LP5SPDIndexSize: {constVal: LP5SPDValueSize}, - LP5SPDIndexRevision: {getVal: LP5EncodeSPDRevision}, - LP5SPDIndexMemoryType: {constVal: LP5SPDValueMemoryType}, - LP5SPDIndexModuleType: {constVal: LP5SPDValueModuleType}, - LP5SPDIndexDensityBanks: {getVal: LP5EncodeDensityBanks}, - LP5SPDIndexAddressing: {getVal: LP5EncodeSdramAddressing}, - LP5SPDIndexPackageType: {getVal: LP5EncodePackageType}, - LP5SPDIndexOptionalFeatures: {constVal: LP5SPDValueOptionalFeatures}, - LP5SPDIndexModuleOrganization: {getVal: LP5EncodeModuleOrganization}, - LP5SPDIndexBusWidth: {getVal: LP5EncodeBusWidth}, - LP5SPDIndexTimebases: {constVal: LP5SPDValueTimebases}, - LP5SPDIndexTCKMin: {getVal: LP5EncodeTCKMin}, - LP5SPDIndexTCKMinFineOffset: {getVal: LP5EncodeTCKMinFineOffset}, - LP5SPDIndexTAAMin: {getVal: LP5EncodeTAAMin}, - LP5SPDIndexTAAMinFineOffset: {getVal: LP5EncodeTAAMinFineOffset}, - LP5SPDIndexTRCDMin: {getVal: LP5EncodeTRCDMin}, - LP5SPDIndexTRCDMinFineOffset: {getVal: LP5EncodeTRCDMinFineOffset}, - LP5SPDIndexTRPABMin: {getVal: LP5EncodeTRPABMin}, - LP5SPDIndexTRPABMinFineOffset: {getVal: LP5EncodeTRPABMinFineOffset}, - LP5SPDIndexTRPPBMin: {getVal: LP5EncodeTRPPBMin}, - LP5SPDIndexTRPPBMinFineOffset: {getVal: LP5EncodeTRPPBMinFineOffset}, - LP5SPDIndexTRFCABMinLSB: {getVal: LP5EncodeTRFCABMinLsb}, - LP5SPDIndexTRFCABMinMSB: {getVal: LP5EncodeTRFCABMinMsb}, - LP5SPDIndexTRFCPBMinLSB: {getVal: LP5EncodeTRFCPBMinLsb}, - LP5SPDIndexTRFCPBMinMSB: {getVal: LP5EncodeTRFCPBMinMsb}, + LP5SPDIndexSize: {constVal: LP5SPDValueSize}, + LP5SPDIndexRevision: {getVal: LP5EncodeSPDRevision}, + LP5SPDIndexMemoryType: {constVal: LP5SPDValueMemoryType}, + LP5SPDIndexModuleType: {constVal: LP5SPDValueModuleType}, + LP5SPDIndexDensityBanks: {getVal: LP5EncodeDensityBanks}, + LP5SPDIndexAddressing: {getVal: LP5EncodeSdramAddressing}, + LP5SPDIndexPackageType: {getVal: LP5EncodePackageType}, + LP5SPDIndexOptionalFeatures: {getVal: LP5EncodeOptionalFeatures}, + LP5SPDIndexOtherOptionalFeatures: {getVal: LP5EncodeOtherOptionalFeatures}, + LP5SPDIndexModuleOrganization: {getVal: LP5EncodeModuleOrganization}, + LP5SPDIndexBusWidth: {getVal: LP5EncodeBusWidth}, + LP5SPDIndexTimebases: {constVal: LP5SPDValueTimebases}, + LP5SPDIndexTCKMin: {getVal: LP5EncodeTCKMin}, + LP5SPDIndexTCKMinFineOffset: {getVal: LP5EncodeTCKMinFineOffset}, + LP5SPDIndexTAAMin: {getVal: LP5EncodeTAAMin}, + LP5SPDIndexTAAMinFineOffset: {getVal: LP5EncodeTAAMinFineOffset}, + LP5SPDIndexTRCDMin: {getVal: LP5EncodeTRCDMin}, + LP5SPDIndexTRCDMinFineOffset: {getVal: LP5EncodeTRCDMinFineOffset}, + LP5SPDIndexTRPABMin: {getVal: LP5EncodeTRPABMin}, + LP5SPDIndexTRPABMinFineOffset: {getVal: LP5EncodeTRPABMinFineOffset}, + LP5SPDIndexTRPPBMin: {getVal: LP5EncodeTRPPBMin}, + LP5SPDIndexTRPPBMinFineOffset: {getVal: LP5EncodeTRPPBMinFineOffset}, + LP5SPDIndexTRFCABMinLSB: {getVal: LP5EncodeTRFCABMinLsb}, + LP5SPDIndexTRFCABMinMSB: {getVal: LP5EncodeTRFCABMinMsb}, + LP5SPDIndexTRFCPBMinLSB: {getVal: LP5EncodeTRFCPBMinLsb}, + LP5SPDIndexTRFCPBMinMSB: {getVal: LP5EncodeTRFCPBMinMsb}, } /* ------------------------------------------------------------------------------------------ */ @@ -418,6 +433,26 @@ func LP5EncodeModuleOrganization(memAttribs *LP5MemAttributes) byte { return b } +func LP5EncodeOptionalFeatures(memAttribs *LP5MemAttributes) byte { + f, ok := LP5SetInfo[LP5CurrSet] + + if ok == false { + return 0 + } + + return f.optionalFeatures +} + +func LP5EncodeOtherOptionalFeatures(memAttribs *LP5MemAttributes) byte { + f, ok := LP5SetInfo[LP5CurrSet] + + if ok == false { + return 0 + } + + return f.otherOptionalFeatures +} + func LP5EncodeBusWidth(memAttribs *LP5MemAttributes) byte { f, ok := LP5SetInfo[LP5CurrSet] -- 2.11.4.GIT