| commit | fe3eabcaed5dfc465808bb9e1881c1a7f1409a37 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Mon, 26 Sep 2016 06:44:46 +0000 (26 08:44 +0200) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Tue, 11 Oct 2016 21:35:39 +0000 (11 23:35 +0200) | ||
| tree | af2866849a4af527f5d1807b2a5a2bc6f6b049a0 | treesnapshot (tar.gz zip) |
| parent | 7141ff3b9f836220333ed153b726a6756b3a5f02 | commitdiff |
nb/gm45/gma.c: use linux code to compute LVDS dotclock divisors
This reuses linux code (at least 4.1) to compute the graphic clock
divisors for LVDS displays on the gm45 northbridge.
The divisors m1, m2, n, p1, p2 need to be such that
"BASE_FREQUECY * (5 * (m1 + 2) + (m2 + 2)) / (n + 2)
/ (p1 * p2)" is as close as possible to the target_frequency.
On g4x hardware the BASE_FREQUENCY is 96000kHz.
This potentially increases LVDS display compatibility.
Change-Id: I2323af5756431e89769f95059790f5a922af14b4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16741
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This reuses linux code (at least 4.1) to compute the graphic clock
divisors for LVDS displays on the gm45 northbridge.
The divisors m1, m2, n, p1, p2 need to be such that
"BASE_FREQUECY * (5 * (m1 + 2) + (m2 + 2)) / (n + 2)
/ (p1 * p2)" is as close as possible to the target_frequency.
On g4x hardware the BASE_FREQUENCY is 96000kHz.
This potentially increases LVDS display compatibility.
Change-Id: I2323af5756431e89769f95059790f5a922af14b4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16741
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| src/northbridge/intel/gm45/gma.c | diffblobblamehistory |