| commit | f6dbf4a46a44e3cc63fa734d9a77e3bc6e622aa8 | |
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | |
| Wed, 4 Sep 2019 17:32:25 +0000 (4 11:32 -0600) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Sun, 20 Oct 2019 16:28:46 +0000 (20 16:28 +0000) | ||
| tree | 5027712b4f263dc67c7ecb2463819b90734d0c4b | treesnapshot (tar.gz zip) |
| parent | e0fd9a60e7a869eed8bf368afe1e1ab6e6da7a6c | commitdiff |
soc/amd/common/lpc: Add SuperIO decode function
The LPC-ISA bridge supports two ranges for SuperIO control registers.
Add a generic function to allow a mainboard to enable the appropriate
range. Provide #define values that are more descriptive than the
register's field names.
Change-Id: Ic5445cfc137604cb1bb3ee3ea4c3a4ebdb9a9cab
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35271
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The LPC-ISA bridge supports two ranges for SuperIO control registers.
Add a generic function to allow a mainboard to enable the appropriate
range. Provide #define values that are more descriptive than the
register's field names.
Change-Id: Ic5445cfc137604cb1bb3ee3ea4c3a4ebdb9a9cab
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35271
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/amd/common/block/include/amdblocks/lpc.h | diffblobblamehistory | |
| src/soc/amd/common/block/lpc/lpc_util.c | diffblobblamehistory |