| commit | e46cd138ffad3bff6d6a68831c9c65b62e857ce6 | |
| author | Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> | |
| Thu, 8 Jul 2021 09:22:31 +0000 (8 17:22 +0800) | ||
| committer | Hung-Te Lin <hungte@chromium.org> | |
| Mon, 12 Jul 2021 02:54:23 +0000 (12 02:54 +0000) | ||
| tree | 15dc50ef3862705c8d5e6f62c65d5ecf0871d5cb | treesnapshot (tar.gz zip) |
| parent | 2555bd410b104407ba137955abecf38cc89f53df | commitdiff |
vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
Add the implementation for vcore voltage control.
Also remove the reporting of vio18 because it is fixed during DRAM init,
and we won't provide drivers for reading or writing it.
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56106
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add the implementation for vcore voltage control.
Also remove the reporting of vio18 because it is fixed during DRAM init,
and we won't provide drivers for reading or writing it.
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56106
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c | diffblobblamehistory | |
| src/vendorcode/mediatek/mt8195/dramc/dramc_top.c | diffblobblamehistory |