| commit | e3a692d7daf16d53764a4b0e30531491d4ae24bd | |
| author | Furquan Shaikh <furquan@google.com> | |
| Wed, 1 Jun 2016 22:09:21 +0000 (1 15:09 -0700) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Fri, 3 Jun 2016 02:53:58 +0000 (3 04:53 +0200) | ||
| tree | bedb6cd4b275ddc21d64926f36009a7cf6c150bf | treesnapshot (tar.gz zip) |
| parent | b54a2d1d76549fc6dfacb880439d8785a50a589f | commitdiff |
intel/apollolake: Clear TSEG reg early in bootblock
TSEG register comes out of reset with a non-zero default value. This
causes issues when cbmem_top returns non-zero value based on TSEG read
before DRAM is initialized. Thus, clear TSEG reg early in bootblock to
avoid unwanted side-effects.
Change-Id: Id3c6c270774108e4caf56e2a07c5072edc65bb58
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15049
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
TSEG register comes out of reset with a non-zero default value. This
causes issues when cbmem_top returns non-zero value based on TSEG read
before DRAM is initialized. Thus, clear TSEG reg early in bootblock to
avoid unwanted side-effects.
Change-Id: Id3c6c270774108e4caf56e2a07c5072edc65bb58
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15049
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
| src/soc/intel/apollolake/bootblock/bootblock.c | diffblobblamehistory |