| commit | e3a079cff89b8101d0b0a3a77938bd1c6ddaf752 | |
| author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | |
| Mon, 24 May 2021 21:32:19 +0000 (24 14:32 -0700) | ||
| committer | Werner Zeh <werner.zeh@siemens.com> | |
| Fri, 28 May 2021 04:53:50 +0000 (28 04:53 +0000) | ||
| tree | a577be1070ba703b42a2adddfdb3f74e8039c801 | treesnapshot (tar.gz zip) |
| parent | c2c4a002ac3c90b9a0e99340835b5a42205bad9f | commitdiff |
mb/intel/adlrvp_m: Disable unused TBT ports from device tree
These PCIe and DMA ports are not available for adlrvp_m.
BUG=none
TEST=Boot device
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Ic568c692fbb82fb3fc70c0cafc2328f8fa2cd74d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
These PCIe and DMA ports are not available for adlrvp_m.
BUG=none
TEST=Boot device
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Ic568c692fbb82fb3fc70c0cafc2328f8fa2cd74d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| src/mainboard/intel/adlrvp/devicetree_m.cb | diffblobblamehistory |