| commit | dcd3cef8744b9d126370565fb3551a1fced8ab04 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Tue, 16 May 2017 15:58:25 +0000 (16 17:58 +0200) | ||
| committer | Arthur Heymans <arthur@aheymans.xyz> | |
| Mon, 12 Jun 2017 09:42:56 +0000 (12 11:42 +0200) | ||
| tree | 2094823e83af0f34bb964ce3e5e3b2b25de812cf | treesnapshot (tar.gz zip) |
| parent | f6934f5c6c32af9261a6f45d0c3eaf1ad45b2d32 | commitdiff |
nb/intel/sandybridge: Improve CAS freq selection
The previous code seemed weird and tried to check if its selected
value is supported three times.
This also lower the clock if a selected frequency does not result in a
supported CAS number.
Change-Id: I97244bc3940813c5a5fcbd770d71cca76d21fcae
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
The previous code seemed weird and tried to check if its selected
value is supported three times.
This also lower the clock if a selected frequency does not result in a
supported CAS number.
Change-Id: I97244bc3940813c5a5fcbd770d71cca76d21fcae
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
| src/include/device/dram/ddr3.h | diffblobblamehistory | |
| src/northbridge/intel/sandybridge/raminit_sandy.c | diffblobblamehistory |