| commit | d1130b7ec0c2e651317015d54b9dc726fb760924 | |
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | |
| Tue, 16 Aug 2022 23:42:57 +0000 (16 17:42 -0600) | ||
| committer | Raul Rangel <rrangel@chromium.org> | |
| Wed, 26 Oct 2022 16:00:54 +0000 (26 16:00 +0000) | ||
| tree | 325266fce9ef881922adb2a9db9e7462c6f3e96e | treesnapshot (tar.gz zip) |
| parent | 0a0e7514bb2253e8c4ce2ba033517000c8078bd4 | commitdiff |
soc/amd/mendocino: Add GSVCD range
Add region/range of SPI ROM to be verified by Google Security Chip
(GSC).
BUG=b:227809919
TEST=Build and boot to OS in Skyrim with CBFS verification enabled.
Change-Id: If8a766d9a7ef26f94e3ab002a9384ba9d444dd1f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Add region/range of SPI ROM to be verified by Google Security Chip
(GSC).
BUG=b:227809919
TEST=Build and boot to OS in Skyrim with CBFS verification enabled.
Change-Id: If8a766d9a7ef26f94e3ab002a9384ba9d444dd1f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
| src/soc/amd/common/Makefile.inc | diffblobblamehistory | |
| src/soc/amd/mendocino/Makefile.inc | diffblobblamehistory |