| commit | d0cef2ac6b0da7e7415bfeb154f0b6e2cfef51a0 | |
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | |
| Mon, 1 Nov 2021 10:13:55 +0000 (1 16:13 +0600) | ||
| committer | Felix Held <felix-coreboot@felixheld.de> | |
| Tue, 9 Nov 2021 20:21:39 +0000 (9 20:21 +0000) | ||
| tree | f0ef871d276c1d331256772b1aa8a8c7d650496a | treesnapshot (tar.gz zip) |
| parent | 6d27905e039fcf8671f6b761665cb35fb148548f | commitdiff |
soc/intel/alderlake: Enable Intel FIVR RFI settings
Add RFI UPD settings to mitigate RFI noise issues and exporting
these UPDs to override via board devicetree.
BUG=b:200886627
TEST=build
Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Add RFI UPD settings to mitigate RFI noise issues and exporting
these UPDs to override via board devicetree.
BUG=b:200886627
TEST=build
Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| src/soc/intel/alderlake/chip.h | diffblobblamehistory | |
| src/soc/intel/alderlake/fsp_params.c | diffblobblamehistory |