| commit | d00d682670e1cf5c031a57274d7c4242f7a8193d | |
| author | Subrata Banik <subrata.banik@intel.com> | |
| Mon, 31 Jul 2017 05:14:09 +0000 (31 10:44 +0530) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Thu, 3 Aug 2017 20:30:09 +0000 (3 20:30 +0000) | ||
| tree | 9e018544bb385ad9647dc9042b4e81490d6bbeca | treesnapshot (tar.gz zip) |
| parent | 4225493159bf1ad35e217d96de9c8222155e57fb | commitdiff |
soc/intel/skylake: Skip disabled IGD device
If IGD PCI device is disabled:
1. BAR for the device will be 0.
2. There is no need to allocate framebuffer for this device.
Some early SOCs don't have GFX model fuse by default hence
we need to add a check to ensure PCI device is enable. This
code to avoid die inside coreboot for missing resources.
Change-Id: Ic31d3e57ba730f6b569bf2cc3bdc54cb369b8caf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
If IGD PCI device is disabled:
1. BAR for the device will be 0.
2. There is no need to allocate framebuffer for this device.
Some early SOCs don't have GFX model fuse by default hence
we need to add a check to ensure PCI device is enable. This
code to avoid die inside coreboot for missing resources.
Change-Id: Ic31d3e57ba730f6b569bf2cc3bdc54cb369b8caf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| src/soc/intel/skylake/igd.c | diffblobblamehistory |