| commit | ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2 | |
| author | Xiang Wang <wxjstz@126.com> | |
| Wed, 1 Aug 2018 04:36:14 +0000 (1 12:36 +0800) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Wed, 5 Sep 2018 10:03:40 +0000 (5 10:03 +0000) | ||
| tree | 14f28736ca3b1e00f7b4819c248e41123b69cc4b | treesnapshot (tar.gz zip) |
| parent | ee0f225e3a4ad89af5aeb2ee623d97ffc5c456fe | commitdiff |
riscv: add support to check machine length at runtime
Highest two bits of misa can be used to check machine length. Add code
to support this.
Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Highest two bits of misa can be used to check machine length. Add code
to support this.
Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
| src/arch/riscv/include/arch/cpu.h | diffblobblamehistory |