| commit | cc0b4527a69530c9a9a97aec265a84b85ca90ea2 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Fri, 6 May 2022 15:04:41 +0000 (6 17:04 +0200) | ||
| committer | Arthur Heymans <arthur@aheymans.xyz> | |
| Fri, 13 May 2022 10:57:28 +0000 (13 10:57 +0000) | ||
| tree | 58c825eecb2277d6eca7ce81d139bb61514576e3 | treesnapshot (tar.gz zip) |
| parent | 0cc56a2848e9558bcc63c5b68924ad46f4339804 | commitdiff |
nb/intel/gm45/iommu.c: Fix clearing GTT
This was dead code as it was checking for the wrong bit (bit 11
indicates the use of shadow GTT). It was doing it at the wrong place
regardless as no BARs are set up.
Move the code clearing GTT into the GMA .init code and do it
unconditionally: if the GTT does not match 2M then the cycles are
simply not decoded.
Tested on thinkpad X200.
Change-Id: Iac3264d484e66e9ca4b3cd3df90ad87a476e31ce
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This was dead code as it was checking for the wrong bit (bit 11
indicates the use of shadow GTT). It was doing it at the wrong place
regardless as no BARs are set up.
Move the code clearing GTT into the GMA .init code and do it
unconditionally: if the GTT does not match 2M then the cycles are
simply not decoded.
Tested on thinkpad X200.
Change-Id: Iac3264d484e66e9ca4b3cd3df90ad87a476e31ce
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
| src/northbridge/intel/gm45/gma.c | diffblobblamehistory | |
| src/northbridge/intel/gm45/iommu.c | diffblobblamehistory |