| commit | c5316ec4d675750f35ff1b383adacc2255e92d79 | |
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | |
| Fri, 29 May 2020 21:20:56 +0000 (29 15:20 -0600) | ||
| committer | Duncan Laurie <dlaurie@chromium.org> | |
| Tue, 7 Jul 2020 20:31:14 +0000 (7 20:31 +0000) | ||
| tree | 9def7221ee37b1c5939f7a9d35e8ba5f0c0fd942 | treesnapshot (tar.gz zip) |
| parent | 3452cb1359229b0457e9e1f6282c67fd459d4c90 | commitdiff |
soc/intel/common/block: Add new block DTT
Intel Dynamic Tuning Technology is the name of a PCI device on some
Intel SoCs. This minimal PCI driver is only used now for SSDT generation
on TGL devices.
Change-Id: Ib52f35e4e020ca3e6ab8b32cc3bf7df36041926e
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41893
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Intel Dynamic Tuning Technology is the name of a PCI device on some
Intel SoCs. This minimal PCI driver is only used now for SSDT generation
on TGL devices.
Change-Id: Ib52f35e4e020ca3e6ab8b32cc3bf7df36041926e
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41893
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/include/device/pci_ids.h | diffblobblamehistory | |
| src/soc/intel/common/block/dtt/Kconfig | [new file with mode: 0644] | blob |
| src/soc/intel/common/block/dtt/Makefile.inc | [new file with mode: 0644] | blob |
| src/soc/intel/common/block/dtt/dtt.c | [new file with mode: 0644] | blob |
| src/soc/intel/tigerlake/Kconfig | diffblobblamehistory |