Revert "Remove sandybridge and ivybridge FSP code path"
commitbf6b83abe06ff53033e7cd74134972de6791cf26
authorMartin Roth <martinroth@google.com>
Sun, 11 Oct 2015 08:37:02 +0000 (11 10:37 +0200)
committerRonald G. Minnich <rminnich@gmail.com>
Thu, 22 Oct 2015 19:51:01 +0000 (22 21:51 +0200)
tree39d542ba472cd4398a030989e824e661a8751d49
parenta4ffe8aa4981130b240eee5ed22c5bbfa1c7598b
Revert "Remove sandybridge and ivybridge FSP code path"

Please don't remove chipsets and mainboards without discussion and input
from the owners. Someone was asking about cougar canyon 2 just a couple
of weeks ago - there's obviously still interest.

This reverts commit fb50124d22014742b6990a95df87a7a828e891b6.

Change-Id: Icd7dcea21fa4a7808b25bb8727020701aeebffc9
Signed-off-by: Martin Roth <martinroth@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/12128
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
92 files changed:
src/cpu/intel/Kconfig
src/cpu/intel/Makefile.inc
src/cpu/intel/fsp_model_206ax/Kconfig [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/Makefile.inc [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/acpi.c [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/acpi/cpu.asl [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/bootblock.c [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/chip.h [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/finalize.c [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/model_206ax.h [new file with mode: 0644]
src/cpu/intel/fsp_model_206ax/model_206ax_init.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/Kconfig [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/Kconfig.name [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi/ec.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi/hostbridge_pci_irqs.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi/mainboard.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi/platform.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi/superio.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/acpi_tables.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/board_info.txt [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/cmos.layout [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/devicetree.cb [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/dsdt.asl [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/gpio.h [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/hda_verb.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/mainboard.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/mainboard_smi.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/romstage.c [new file with mode: 0644]
src/mainboard/intel/cougar_canyon2/thermal.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/Kconfig [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/Makefile.inc [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/acpi.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/chip.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/early_init.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/finalize.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/fsp/Kconfig [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/fsp/Makefile.inc [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/gma.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/gma.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/northbridge.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/northbridge.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/northbridge_pci_devs.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/ram_calc.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/raminit.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/raminit.h [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/report_platform.c [new file with mode: 0644]
src/northbridge/intel/fsp_sandybridge/udelay.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/Kconfig [copied from src/vendorcode/intel/Kconfig with 51% similarity]
src/southbridge/intel/fsp_bd82x6x/Makefile.inc [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/audio.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/irqlinks.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/pcie.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/pcie_port.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/sata.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/sleepstates.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/smbus.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/acpi/usb.asl [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/azalia.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/bootblock.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/chip.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/early_init.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/early_me.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/early_smbus.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/early_spi.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/early_usb.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/elog.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/finalize.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/gpio.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/gpio.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/lpc.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/me.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/me.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/me_8.x.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/me_status.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/nvs.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/pch.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/pch.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/reset.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/sata.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/smi.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/smihandler.c [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/southbridge_pci_devs.h [new file with mode: 0644]
src/southbridge/intel/fsp_bd82x6x/watchdog.c [new file with mode: 0644]
src/vendorcode/intel/Kconfig
util/board_status/to-wiki/towiki.sh