| commit | b7ec252d378deee1d07175c8fdc8d2302f7fbcef | |
| author | Philip Chen <philipchen@google.com> | |
| Wed, 24 Jul 2019 21:35:44 +0000 (24 14:35 -0700) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Fri, 2 Aug 2019 15:43:10 +0000 (2 15:43 +0000) | ||
| tree | c00b746400d6bc04c58d242e15acd7a86ebea210 | treesnapshot (tar.gz zip) |
| parent | 43d07f75cf001b49422470ba63ea1d0afb049ea4 | commitdiff |
mb/google/hatch: Fine-tune Kohaku I2C CLK frequency
Add rise time / fall time to I2C config in device tree to ensure I2C
CLK runs accurately at I2C_SPEED_FAST (400 kHz).
BUG=b:138258384
BRANCH=none
TEST=probe I2C0/I2C2/I2C3 SCL on Kohaku board, verify all of them run
at 395-399 kHz.
Change-Id: Id98079e717f0db3fdcb88f85e45693925d11d7fd
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34559
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add rise time / fall time to I2C config in device tree to ensure I2C
CLK runs accurately at I2C_SPEED_FAST (400 kHz).
BUG=b:138258384
BRANCH=none
TEST=probe I2C0/I2C2/I2C3 SCL on Kohaku board, verify all of them run
at 395-399 kHz.
Change-Id: Id98079e717f0db3fdcb88f85e45693925d11d7fd
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34559
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/google/hatch/variants/kohaku/overridetree.cb | diffblobblamehistory |