fsp_baytrail: Add new microcode for Bay Trail M
commitb5a374d58befa96f718d0c2cee9afafb60867f18
authorWerner Zeh <werner.zeh@siemens.com>
Tue, 10 Feb 2015 09:16:12 +0000 (10 10:16 +0100)
committerPatrick Georgi <pgeorgi@google.com>
Thu, 5 Mar 2015 11:45:10 +0000 (5 12:45 +0100)
tree6be19a296a2155b51933901d83cdd3d2025a6654
parentfb9d4caf160436a9f9b16f2103cf635da8460685
fsp_baytrail: Add new microcode for Bay Trail M

Add a new microcode for Bay Trail M D0 stepping used
in cpu N2807 silicon.
In addition, a selection of the used CPU type has
been added (I or M/D) which allows to use only the
really needed microcode for a given CPU type.

Change-Id: I373fc9b535f1dc97eaa9f76ae46f0b69b247a8a0
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/8399
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
src/soc/intel/fsp_baytrail/Kconfig
src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
src/soc/intel/fsp_baytrail/microcode/microcode_size.h