| commit | b53858bacee1b3561ab0c70e3f82196f4e7eb6cb | |
| author | Benjamin Doron <benjamin.doron00@gmail.com> | |
| Mon, 12 Oct 2020 04:19:42 +0000 (12 04:19 +0000) | ||
| committer | Nico Huber <nico.h@gmx.de> | |
| Fri, 16 Oct 2020 22:03:34 +0000 (16 22:03 +0000) | ||
| tree | 71a05fe3201906f4ef52a81c0848a64ce994dbd2 | treesnapshot (tar.gz zip) |
| parent | 3f1de9add900305730a28be919a21a682ae6b224 | commitdiff |
soc/intel/skylake: Rename PcieRpAspm devicetree config
This configuration option shares a name with the FSP UPD, but
is enumerated differently. Change its name to minimise confusion
about the options.
Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This configuration option shares a name with the FSP UPD, but
is enumerated differently. Change its name to minimise confusion
about the options.
Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
| src/mainboard/facebook/monolith/devicetree.cb | diffblobblamehistory | |
| src/soc/intel/skylake/chip.c | diffblobblamehistory | |
| src/soc/intel/skylake/chip.h | diffblobblamehistory |