soc/amd/common/block/gpio_banks: add remote GPIO support
commitb4fe8c5948bebba435cce76c0dfa9a7d8ed348b4
authorFelix Held <felix-coreboot@felixheld.de>
Wed, 28 Jul 2021 19:24:40 +0000 (28 21:24 +0200)
committerFelix Held <felix-coreboot@felixheld.de>
Thu, 9 Sep 2021 17:49:11 +0000 (9 17:49 +0000)
treeef96509a0d2c539a33ff325fbce33220606e522b
parent627c8443a3ddaded2c1cf4ac0811164eb1943815
soc/amd/common/block/gpio_banks: add remote GPIO support

Some AMD SoCs have a 5th GPIO bank, the remote GPIO bank, which isn't
located right after the 4th GPIO bank, but instead at a different
location inside the APCIMMIO region. A difference to the first 4 GPIO
banks is that the corresponding GPIO MUX registers aren't in a separate
bank, but at the end of the remote GPIO region. So this remote GPIO
region only supports 48 GPIOs with a 32 bit configuration register each
and has the 8 bit GPIO MUX registers beginning at offset 0xc0 in the
remote GPIO region.

For now using the remote GPIOs from verstage on PSP isn't supported. To
support this, it would need to map acpimmio_remote_gpio and update the
pointer like it already does for acpimmio_gpio0, acpimmio_iomux and a
few others.

BUG=b:194524995

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic8d7ff677a99381a5558782b80b0c4cae67602db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
src/soc/amd/common/block/gpio_banks/gpio.c
src/soc/amd/common/block/include/amdblocks/gpio_defs.h