urara: Configure clocks and MFIOs
commitb3f666b252a7057a49f24b239e7f6c4ffd4f3350
authorIonela Voinescu <ionela.voinescu@imgtec.com>
Sun, 18 Jan 2015 22:37:11 +0000 (18 22:37 +0000)
committerPatrick Georgi <pgeorgi@google.com>
Tue, 14 Apr 2015 10:07:47 +0000 (14 12:07 +0200)
treef5531b11b67cc20432d5dd58d71889d2653e5bde
parent95c902261f0dcd4b143418272282dc0fc30752cf
urara: Configure clocks and MFIOs

Set elements:
- UART1 clock dividers and MFIOs
- SPIM1 clock dividers and MFIOs
- USB clock dividers
- System clock divider
- System PLL
- MIPS CPU PLL

BUG=chrome-os-partner:31438
TEST=tested on Pisachio bring up board; UART, SPI NOR, SPI NAND, and USB
have proper functionality.
BRANCH=none

Change-Id: Ib01186a652fd59295a4cafc3ca99b94aa9564f74
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 65e68d82f34bb40ef3cfb397ecf5df0c83201151
Original-Change-Id: Ia2c31bbbfc020dc4fd71c72b877414adfdfc42a8
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/241423
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9662
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
src/mainboard/google/urara/Kconfig
src/mainboard/google/urara/bootblock.c [new file with mode: 0644]
src/soc/imgtec/pistachio/Makefile.inc
src/soc/imgtec/pistachio/clocks.c [new file with mode: 0644]
src/soc/imgtec/pistachio/include/soc/clocks.h [new file with mode: 0644]