| commit | b24e45d215db9e0febed1b355b28f685caea2617 | |
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | |
| Fri, 11 Mar 2022 05:45:18 +0000 (11 13:45 +0800) | ||
| committer | Felix Held <felix-coreboot@felixheld.de> | |
| Fri, 18 Mar 2022 15:39:47 +0000 (18 15:39 +0000) | ||
| tree | b5ac2795ce0c1b792a9d22c59d309514f91dde78 | treesnapshot (tar.gz zip) |
| parent | 2b19d547c0866fef84bdb7b226ce7a4ac81af64f | commitdiff |
mb/google/brya/var/kinox: Reconfigure GPIO settings
Configure GPIOs according to updated schematics.
- GPP_A21 from NC to TCP_DP1_CTRLCLK.
- GPP_A22 from NC to TCP_DP1_CTRLDATA.
- GPP_E22 from DDIA_DP_CTRLCLK to NC.
- GPP_E23 from DDIA_DP_CTRLDATA to NC.
BUG=b:214025396
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I9d2d73820fbb191b682713e4e351c6375927ddf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Configure GPIOs according to updated schematics.
- GPP_A21 from NC to TCP_DP1_CTRLCLK.
- GPP_A22 from NC to TCP_DP1_CTRLDATA.
- GPP_E22 from DDIA_DP_CTRLCLK to NC.
- GPP_E23 from DDIA_DP_CTRLDATA to NC.
BUG=b:214025396
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I9d2d73820fbb191b682713e4e351c6375927ddf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| src/mainboard/google/brya/variants/kinox/gpio.c | diffblobblamehistory |