| commit | a4e9395979b73182fa2b944271e4436c812f4e91 | |
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | |
| Tue, 10 Dec 2019 13:53:00 +0000 (10 14:53 +0100) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Tue, 17 Dec 2019 13:05:49 +0000 (17 13:05 +0000) | ||
| tree | 6069419b751878db39331fbc0ab89ae0087fe525 | treesnapshot (tar.gz zip) |
| parent | 021462bb263040470c619c1360a44cd747bf86e8 | commitdiff |
superio/aspeed/ast2400: Add AST2500 support
The AST2500 is similar to the AST2400, but it also supports ESPI mode.
In ESPI mode the IRQ level must be 0 and UART3/UART4 aren't usable.
Change-Id: Iea45740427ad56656040e6342f5316ec9d38122f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37641
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
The AST2500 is similar to the AST2400, but it also supports ESPI mode.
In ESPI mode the IRQ level must be 0 and UART3/UART4 aren't usable.
Change-Id: Iea45740427ad56656040e6342f5316ec9d38122f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37641
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| src/superio/aspeed/ast2400/chip.h | [new file with mode: 0644] | blob |
| src/superio/aspeed/ast2400/superio.c | diffblobblamehistory |