| commit | a1ef94e822a0a2d1093e62d13ceb6dbeb19b22a1 | |
| author | Michael Niewöhner <foss@mniewoehner.de> | |
| Sun, 1 Sep 2019 11:53:09 +0000 (1 13:53 +0200) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Sun, 15 Sep 2019 20:56:24 +0000 (15 20:56 +0000) | ||
| tree | 7defef16f2a0645c7778527b6a9ec13e2fb1b2d8 | treesnapshot (tar.gz zip) |
| parent | 5ea2e405dad22930db8f5e8dcf1a1fe383284919 | commitdiff |
soc/intel/skylake: add some FSP SATA params
This adds SATA parameters for SpinUp, HotPlug and TestMode to the
Skylake FSP 2.0 interface.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I7ba67879b78c2cb0fd0b0ce832140b213edd5884
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35186
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This adds SATA parameters for SpinUp, HotPlug and TestMode to the
Skylake FSP 2.0 interface.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I7ba67879b78c2cb0fd0b0ce832140b213edd5884
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35186
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/skylake/chip.h | diffblobblamehistory | |
| src/soc/intel/skylake/chip_fsp20.c | diffblobblamehistory |