sb/intel/i82801ix: Add common code to set up LPC IO decode ranges
commit9ed0df4c380dc56a81a59a104b1ccac19cd52c35
authorArthur Heymans <arthur@aheymans.xyz>
Sat, 12 Oct 2019 12:18:18 +0000 (12 14:18 +0200)
committerArthur Heymans <arthur@aheymans.xyz>
Mon, 14 Oct 2019 08:15:49 +0000 (14 08:15 +0000)
treece96a0374015a55cf9a44e3fc490c1e70c39b236
parentd3a1a4171ee9f64f7721660f185b649ef874cc15
sb/intel/i82801ix: Add common code to set up LPC IO decode ranges

This does the following:
- Add gen[1-4]_dec options to the devicetree to set up generic LPC
  decode ranges in the southbridge code.
- Move setting up some default decode ranges to a common place. If
  somehow a board needs to override this behavior it can happen in the
  mb_setup_superio() hook (that will be renamed when moving to
  C_ENVIRONMENT_BOOTBLOCK).

Change-Id: I3d904b1125bc410c11aa73a89b1969284e88dac1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
src/mainboard/lenovo/t400/devicetree.cb
src/mainboard/lenovo/t400/romstage.c
src/mainboard/lenovo/x200/devicetree.cb
src/mainboard/lenovo/x200/romstage.c
src/mainboard/roda/rk9/devicetree.cb
src/mainboard/roda/rk9/romstage.c
src/northbridge/intel/gm45/gm45.h
src/northbridge/intel/gm45/romstage.c
src/southbridge/intel/i82801ix/chip.h
src/southbridge/intel/i82801ix/early_init.c
src/southbridge/intel/i82801ix/i82801ix.h