| commit | 9c27eda052fdf189288dc12223c0673109576725 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Tue, 13 Jun 2017 12:47:28 +0000 (13 14:47 +0200) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Fri, 16 Jun 2017 14:03:34 +0000 (16 16:03 +0200) | ||
| tree | 2bb5096247eb2177799dcbd9780a6fde62bb261b | treesnapshot (tar.gz zip) |
| parent | 432ac615d018465e9808be4286c0caf2ca192cf1 | commitdiff |
soc/intel/braswell: Hide some Kconfig options in menuconfig
Don't allow the user to set PCIe configspace base address.
Don't allow the user to set the DCACHE size and base.
Change-Id: I7a42cc5f6098214364624bcfa3cbd93b4903ee84
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Don't allow the user to set PCIe configspace base address.
Don't allow the user to set the DCACHE size and base.
Change-Id: I7a42cc5f6098214364624bcfa3cbd93b4903ee84
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
| src/soc/intel/braswell/Kconfig | diffblobblamehistory |