| commit | 9bd601584350f51f112b15a7369f9aa82f1d0919 | |
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | |
| Fri, 4 May 2018 07:01:38 +0000 (4 09:01 +0200) | ||
| committer | Patrick Rudolph <siro@das-labor.org> | |
| Fri, 1 Jun 2018 11:57:25 +0000 (1 11:57 +0000) | ||
| tree | ee45fbcba3707110073cb721f01b440cd9b9abe1 | treesnapshot (tar.gz zip) |
| parent | 2ad7ea07b82f99ce9ff751774143e6ebbf02090c | commitdiff |
superio/nuvoton/npcd378: Add PSU fan control
Implement method to access the SuperIO's harware monitor (HWM) IO space.
Set the PSU fan using a new CMOS option psu_fan_lvl. Add the CMOS option
to all board that use NPCD378. In case no CMOS is set use the default
fan level 3.
The HWM space can be written to at any time, but the SuperIO has to be
notified that a write is ongoing. After clearing the write-lock bit all
changes are applied at once.
Tested on HP Compaq 8200 SFF.
Change-Id: I56ce7ad1df88638589a577b8a09d5d775557887b
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26050
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Implement method to access the SuperIO's harware monitor (HWM) IO space.
Set the PSU fan using a new CMOS option psu_fan_lvl. Add the CMOS option
to all board that use NPCD378. In case no CMOS is set use the default
fan level 3.
The HWM space can be written to at any time, but the SuperIO has to be
notified that a write is ongoing. After clearing the write-lock bit all
changes are applied at once.
Tested on HP Compaq 8200 SFF.
Change-Id: I56ce7ad1df88638589a577b8a09d5d775557887b
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26050
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>