| commit | 9addda3c410041ea93ae5587d17460da9a9c312f | |
| author | Angel Pons <th3fanbus@gmail.com> | |
| Wed, 22 Jul 2020 16:37:32 +0000 (22 18:37 +0200) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Mon, 3 Aug 2020 05:32:20 +0000 (3 05:32 +0000) | ||
| tree | 5579f274b2d7e801b819d5711ddbdf96414101c0 | treesnapshot (tar.gz zip) |
| parent | c642a0d8942735b393040b877769f1d4a3a9ebe8 | commitdiff |
nb/intel/ironlake: Add Generic Non-Core register definitions
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.
Change-Id: I4d878b5dbb5a5617143240b8f5bc5b6f5a754511
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.
Change-Id: I4d878b5dbb5a5617143240b8f5bc5b6f5a754511
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| src/northbridge/intel/ironlake/early_init.c | diffblobblamehistory | |
| src/northbridge/intel/ironlake/ironlake.h | diffblobblamehistory | |
| src/northbridge/intel/ironlake/raminit.c | diffblobblamehistory |