| commit | 927fa6d04c0c4f61140bd680c1bd8e06191ea407 | |
| author | Jitao Shi <jitao.shi@mediatek.com> | |
| Mon, 1 Feb 2021 05:21:45 +0000 (1 13:21 +0800) | ||
| committer | Hung-Te Lin <hungte@chromium.org> | |
| Sat, 27 Mar 2021 10:03:41 +0000 (27 10:03 +0000) | ||
| tree | b0bbdae81b673e5d7b927d5c10018356e684726e | treesnapshot (tar.gz zip) |
| parent | 7de5677643294ae021f7012e45dce416639224b2 | commitdiff |
soc/mediatek: Adjust hsa, hbp, hfp packets for MIPI_DSI_MODE_LINE_END
ANX7625 requires the line packets to end at the same time.
Otherwise, the display will be shifted.
BUG=b:173603645
BRANCH=kukui
TEST=Display is normal on Jacuzzi
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Change-Id: I5949de1a9a1947fa188233787166a478b1de68b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
ANX7625 requires the line packets to end at the same time.
Otherwise, the display will be shifted.
BUG=b:173603645
BRANCH=kukui
TEST=Display is normal on Jacuzzi
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Change-Id: I5949de1a9a1947fa188233787166a478b1de68b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
| src/soc/mediatek/common/dsi.c | diffblobblamehistory | |
| src/soc/mediatek/common/include/soc/dsi_common.h | diffblobblamehistory |