| commit | 8b643cea5a3cd75f9e7ce456ba0ab4271fba2c1a | |
| author | Uwe Hermann <uwe@hermann-uwe.de> | |
| Tue, 9 Dec 2008 16:36:12 +0000 (9 16:36 +0000) | ||
| committer | Uwe Hermann <uwe@hermann-uwe.de> | |
| Tue, 9 Dec 2008 16:36:12 +0000 (9 16:36 +0000) | ||
| tree | 8f2f7271b327ae6aea53c661d8155aab305c27c8 | treesnapshot (tar.gz zip) |
| parent | 17da8d706f83d00dc962ffd37ca31be6e88b4b65 | commitdiff |
Add (parts of the) support for multiple DIMMs on the Intel 440BX chipset.
This is tested on hardware with four 128MB DIMMs and works ok, _iff_
you also fix additional registers (e.g. DRB, RPS, ...) for your setup.
This requirement will be eliminated in another upcoming patch (i.e. all
of the required settings will be auto-detected).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This is tested on hardware with four 128MB DIMMs and works ok, _iff_
you also fix additional registers (e.g. DRB, RPS, ...) for your setup.
This requirement will be eliminated in another upcoming patch (i.e. all
of the required settings will be auto-detected).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| src/northbridge/intel/i440bx/raminit.c | diffblobblamehistory |