soc/amd/sabrina: Re-init eSPI in bootblock
commit8b1c6c6cb384c89659abbd043c2566df358d8f95
authorKarthikeyan Ramasubramanian <kramasub@google.com>
Thu, 4 Aug 2022 20:11:07 +0000 (4 14:11 -0600)
committerMartin L Roth <gaumless@gmail.com>
Sun, 7 Aug 2022 19:44:15 +0000 (7 19:44 +0000)
treebb8cf47496e9f03167d71a51637b2ee1071bcb64
parent1c718519f468d8107b92d0a9ac540092ed08b1ea
soc/amd/sabrina: Re-init eSPI in bootblock

Currently bootblock does not initialize eSPI if it is already done in
PSP verstage. But some other component is clobbering the eSPI
configuration causing timeouts in EC communication after the boot flow
hits x86. To workaround this issue, re-initialize eSPI in bootblock.

BUG=b:217414563
TEST=Build and boot to OS in Skyrim with PSP verstage.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I41c0b2816a106a6a547f3cb372693e1bb7f23734
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66443
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
src/soc/amd/sabrina/early_fch.c