| commit | 82ef364f9a6eb1f6f175d52f12f7efc17185f9d7 | |
| author | Subrata Banik <subrata.banik@intel.com> | |
| Sun, 17 Sep 2017 08:06:19 +0000 (17 13:36 +0530) | ||
| committer | Aaron Durbin <adurbin@chromium.org> | |
| Fri, 22 Sep 2017 15:31:09 +0000 (22 15:31 +0000) | ||
| tree | d3762f36ae26f42271ee8d86a0f69774a304116c | treesnapshot (tar.gz zip) |
| parent | 19dbffd010af7713156ccfeecd019a6e8eedefaf | commitdiff |
soc/intel/skylake: Refactor memory layout calculation
This patch split entire memory layout calculation into
two parts. 1. Generic memory layout 2. SoC specific
reserve memory layout.
usable memory start = TOLUD - Generic memory size -
- soc specific reserve memory size.
Change-Id: I510d286ce5e0d8509ec31a65e971d5f19450364f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch split entire memory layout calculation into
two parts. 1. Generic memory layout 2. SoC specific
reserve memory layout.
usable memory start = TOLUD - Generic memory size -
- soc specific reserve memory size.
Change-Id: I510d286ce5e0d8509ec31a65e971d5f19450364f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| src/soc/intel/skylake/memmap.c | diffblobblamehistory |