intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup
commit823020d56be1bf6425b4e433a1f1c2bbc2c4c90b
authorKyösti Mälkki <kyosti.malkki@gmail.com>
Fri, 22 Jul 2016 19:53:19 +0000 (22 22:53 +0300)
committerKyösti Mälkki <kyosti.malkki@gmail.com>
Sun, 11 Dec 2016 07:57:17 +0000 (11 08:57 +0100)
tree83bcc59a0c5c8f77322b846018d1ba84edb74566
parent811932a61411f5258096e734a158be01c00cf940
intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup

Adapt implementation from skylake to prepare for removal of
HIGH_MEMORY_SAVE and moving on to RELOCATABLE_RAMSTAGE.
With this change, CBMEM region is set early-on as WRBACK
with MTRRs and romstage ram stack is moved to CBMEM.

Change-Id: Idee5072fd499aa3815b0d78f54308c273e756fd1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15791
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
src/cpu/intel/car/cache_as_ram_ht.inc
src/cpu/intel/car/romstage.c
src/cpu/intel/model_6ex/cache_as_ram.inc
src/mainboard/lenovo/t400/romstage.c
src/mainboard/lenovo/x200/romstage.c
src/mainboard/roda/rk9/romstage.c
src/northbridge/intel/gm45/ram_calc.c
src/northbridge/intel/i945/early_init.c
src/northbridge/intel/i945/ram_calc.c
src/northbridge/intel/x4x/ram_calc.c