drivers/pc80: Add optional spinlock for nvram CBFS access
commit7b22d84d55386ee422fa77c1d8bce9dddeaaa231
authorTimothy Pearson <tpearson@raptorengineeringinc.com>
Sat, 29 Aug 2015 00:52:05 +0000 (28 19:52 -0500)
committerMartin Roth <martinroth@google.com>
Fri, 18 Dec 2015 18:47:01 +0000 (18 19:47 +0100)
tree7c1afd131b1c3a504bae653cffb3e87d5062dac0
parent5a3f1e54d55b416361d486d3b9136c65b6847242
drivers/pc80: Add optional spinlock for nvram CBFS access

When enabling the IOMMU on certain systems dmesg is spammed with I/O page faults like the following:
AMD-Vi: Event logged [IO_PAGE_FAULT device=00:14.0 domain=0x000a address=0x000000fdf9103300 flags=0x0030]

Decoding the faulting address:
0x000000fdf9103300
        fdf91x          Hypertransport system management region
              33        SysMgtCmd (System Management Command) = 0x33
              3         Base Command Type = 0x3: STPCLK (Stop Clock request)
               3        SMAF (System Management Action Field) = [3:1] = 0x1
               1        Signal State Bit Map = [0] = 0x1

Therefore, the error appears to be triggered by an upstream C1E request.

This was eventually traced to concurrent access to the SP5100's SPI Flash controller by
multiple APs during startup.  Calls to the nvram read functions get_option and read_option
call CBFS functions, which in turn make near-simultaneous requests to the SPI Flash
controller, thus placing the SP5100 in an invalid state.  This limitation is not documented
in any public AMD errata, and was only discovered through considerable debugging effort.

Change-Id: I4e61b1ab767b1b7958ac7c1cf20eee41d2261bef
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12061
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
src/Kconfig
src/arch/x86/include/arch/smp/spinlock.h
src/cpu/amd/car/post_cache_as_ram.c
src/drivers/pc80/mc146818rtc.c