soc/intel/tigerlake: Generate PMC ACPI device at runtime
commit7729b29a589ca971a3122731ffc043039813279d
authorTim Wawrzynczak <twawrzynczak@chromium.org>
Thu, 14 May 2020 22:21:09 +0000 (14 16:21 -0600)
committerDuncan Laurie <dlaurie@chromium.org>
Thu, 28 May 2020 20:22:47 +0000 (28 20:22 +0000)
tree7b28a04aac66cceb683e4b2e74d305d9b3b06dad
parent0013623b7c976b8f79778cecf3f146dc7aeab6e9
soc/intel/tigerlake: Generate PMC ACPI device at runtime

In an attempt to help reduce the amount of static ASL files that are
littered throughout the codebase, pmc.asl was converted to runtime SSDT
generation instead. If future SoCs reuse the same PMC, then this
function can be moved to soc/intel/common/block/pmc for example.

TEST=Verified the following was in the decompiled SSDT:
    Scope (\_SB.PCI0)
    {
        Device (PMC)
        {
            Name (_HID, "INTC1026")  // _HID: Hardware ID
            Name (_DDN, "Intel(R) Tiger Lake IPC Controller")
            Name (_CRS, ResourceTemplate ()
            {
                Memory32Fixed (ReadWrite,
                    0xFE000000,         // Address Base
                    0x00010000,         // Address Length
                    )
            })
        }
    }

Also the following found in linux's /var/log/messages:
"acpi INTC1026:00: GPIO: looking up 0 in _CRS", indicating the PMC
ACPI device was found and its _CRS was locatable.

Change-Id: I665c873d8a80bd503acc4a9f0241c7a6ea425e16
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
src/soc/intel/tigerlake/acpi/pmc.asl [deleted file]
src/soc/intel/tigerlake/acpi/southbridge.asl
src/soc/intel/tigerlake/pmc.c