| commit | 76653f638f8b1c0689307a8a58d63b2a1b126862 | |
| author | Angel Pons <th3fanbus@gmail.com> | |
| Thu, 29 Oct 2020 12:31:08 +0000 (29 13:31 +0100) | ||
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | |
| Thu, 17 Aug 2023 15:02:44 +0000 (17 15:02 +0000) | ||
| tree | 8f765bc0f74cdb34f061aa4618e11d0b76061a03 | treesnapshot (tar.gz zip) |
| parent | e49d03395f019d5081f1ffa6007b720e6feee4a0 | commitdiff |
sb/intel/lynxpoint/acpi: Update xHCI workarounds for LPT
Backport commit cf544ac (broadwell: Remove XHCI workarounds on WPT).
Newer Lynxpoint reference code shows LPT-H also uses these workarounds.
Also, add the `ISWP` object (Name or Method) to test for WildcatPoint.
Change-Id: I76bc07e585e8af292c7316442760d1cfabf1e9c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46960
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Backport commit cf544ac (broadwell: Remove XHCI workarounds on WPT).
Newer Lynxpoint reference code shows LPT-H also uses these workarounds.
Also, add the `ISWP` object (Name or Method) to test for WildcatPoint.
Change-Id: I76bc07e585e8af292c7316442760d1cfabf1e9c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46960
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
| src/southbridge/intel/lynxpoint/acpi/pch.asl | diffblobblamehistory | |
| src/southbridge/intel/lynxpoint/acpi/xhci.asl | diffblobblamehistory |