| commit | 764b987a6f93a64f18b1557e1591fc2afe47110c | |
| author | Felix Held <felix-coreboot@felixheld.de> | |
| Fri, 28 Aug 2020 00:12:06 +0000 (28 02:12 +0200) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Mon, 31 Aug 2020 06:42:49 +0000 (31 06:42 +0000) | ||
| tree | e97eebd3199373d82bfeaaa53747a1d21d49c613 | treesnapshot (tar.gz zip) |
| parent | 82a0a63f99a7c9e9afaf7fc6b85a93ef75e480cf | commitdiff |
mb/google/zork/trembyle: add PCIe GPP clock setting to devicetree
BUG=b:149970243
BRANCH=zork
Change-Id: Ie3fc83484c6ce769956dc8e6e57194ffebb4f5b0
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44890
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
BUG=b:149970243
BRANCH=zork
Change-Id: Ie3fc83484c6ce769956dc8e6e57194ffebb4f5b0
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44890
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb | diffblobblamehistory |