| commit | 71139b2048cc9d80e20985111a1e736ee986d50c | |
| author | John Su <john_su@compal.corp-partner.google.com> | |
| Thu, 7 Jul 2022 07:55:57 +0000 (7 15:55 +0800) | ||
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | |
| Fri, 8 Jul 2022 15:30:13 +0000 (8 15:30 +0000) | ||
| tree | 552fd3709b5ada551eb2672002e7329000a345db | treesnapshot (tar.gz zip) |
| parent | 8bbc5ba0aef5ba57ca5bac1873619047d8466bf9 | commitdiff |
mb/google/brya/variants/felwinter: Add fw_config to control TBT PCIe RP0
Use USB4 fw_config to enable TBT PCIe RP0.
BUG=b:237619214, b:237623610
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Ie3e51a0f30e0c9d20127c017436813d4ede95639
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65696
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Use USB4 fw_config to enable TBT PCIe RP0.
BUG=b:237619214, b:237623610
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Ie3e51a0f30e0c9d20127c017436813d4ede95639
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65696
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
| src/mainboard/google/brya/variants/felwinter/overridetree.cb | diffblobblamehistory |