cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE
commit6f8b7df8ab69cd2be7d024dfbd7fbeb3a684c6b3
authorNico Huber <nico.huber@secunet.com>
Sat, 8 Oct 2016 16:42:46 +0000 (8 18:42 +0200)
committerNico Huber <nico.h@gmx.de>
Tue, 11 Oct 2016 09:37:10 +0000 (11 11:37 +0200)
tree3060c73ee0303ecb638fc9d80ce5268010855504
parentc9848a82e23f826adb97a251031b0625e9809b24
cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE

An epic battle to fix Nehalem finally ended when we found an odd mask
set in SMRR. This was caused by a wrong calculation of TSEG size. It
was assumed that TSEG spans the whole space between TSEG base
and GTT. This is wrong as TSEG base might have been aligned down.

TEST: On X201, copied 1GiB from usb key to sd-card and verified.

Change-Id: Id8c8a656446f092629fe2517f043e3c6d0f1b6b7
Found-by: Alexander Couzens, Nico Huber
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16939
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
src/cpu/intel/smm/gen1/smi.h
src/cpu/intel/smm/gen1/smmrelocate.c
src/northbridge/intel/fsp_sandybridge/northbridge.c
src/northbridge/intel/nehalem/northbridge.c
src/northbridge/intel/sandybridge/northbridge.c