google/veyron_*: Add new Micron and Hynix modules
commit6d5b2f7057d71d925647590462ac8d88109c462c
authorDavid Hendricks <dhendrix@chromium.org>
Thu, 17 Nov 2016 22:19:51 +0000 (17 14:19 -0800)
committerPatrick Georgi <pgeorgi@google.com>
Tue, 7 Mar 2017 16:45:53 +0000 (7 17:45 +0100)
tree9cceab0330e25a1e58f8c4b059b035e9d52314a9
parent16568c7535c7532b7ee9f1ce2231dabd518921e3
google/veyron_*: Add new Micron and Hynix modules

This adds SDRAM entries for the following modules:
- Micron: DDMT52L256M64D2PP-107
- Hynix: H9CCNNNBKTALBR-NUD

They are compatible with Samsung K4E8E324EB-EGCF, so this just
copies sdram-lpddr3-samsung-2GB-24EB.inc and changes the name used
in the comment near the top.

Notes on our "special snowflake" boards:
- veyron_danger's RAM ID is hard-coded to zero, so I skipped changes
  involving the binary first numbering scheme.
- Rialto's SDRAM mapping is different, so I padded its SDRAM entries
  to 24 to match other boards.
- veyron_mickey requires different MR3 and ODT settings than other
  boards due to its unique PCB (chrome-os-partner:43626).

BUG=chrome-os-partner:59997
BRANCH=none
TEST=Booted new modules on Mickey (see BUG)

Change-Id: If2e22c83f4a08743f12bbc49b3fabcbf1d7d07dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 35cac483e86e57899dbb0898dad3510f4c2ab2d3
Original-Change-Id: I22386a25b965a4b96194d053b97e3269dbdea8c7
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/412328
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Queue: Jiazi Yang <Tomato_Yang@asus.com>
Original-Tested-by: Jiazi Yang <Tomato_Yang@asus.com>
Original-(cherry picked from commit bd5aa1a5488b99f2edc3e79951064a1f824062f6)
Original-Reviewed-on: https://chromium-review.googlesource.com/446299
Original-Commit-Ready: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18518
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
src/mainboard/google/veyron/boardid.c
src/mainboard/google/veyron/sdram_configs.c
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc [new file with mode: 0644]
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc [new file with mode: 0644]
src/mainboard/google/veyron_mickey/boardid.c
src/mainboard/google/veyron_mickey/sdram_configs.c
src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc [new file with mode: 0644]
src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc [new file with mode: 0644]
src/mainboard/google/veyron_rialto/boardid.c
src/mainboard/google/veyron_rialto/sdram_configs.c