| commit | 688257409330b9d12455c6997b0f57f128cd207b | |
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | |
| Tue, 27 Oct 2015 12:31:18 +0000 (27 14:31 +0200) | ||
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | |
| Mon, 2 Nov 2015 02:26:09 +0000 (2 03:26 +0100) | ||
| tree | b9020af4edfe73977d818d78715d198c095d6b69 | treesnapshot (tar.gz zip) |
| parent | d28474b46d69e683e26443f295ae4a626d7c3b38 | commitdiff |
asrock/e350m1: Add ACPI S3 support
To store memory configuration in SPI flash currently adds
some 150 ms delay in ramstage, visible in timestamps listing
at 75:cbmem post.
Change-Id: I1160259054b58e9a8df2a105c730e0f4140be1f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/12215
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
To store memory configuration in SPI flash currently adds
some 150 ms delay in ramstage, visible in timestamps listing
at 75:cbmem post.
Change-Id: I1160259054b58e9a8df2a105c730e0f4140be1f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/12215
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| src/mainboard/asrock/e350m1/Kconfig | diffblobblamehistory | |
| src/mainboard/asrock/e350m1/buildOpts.c | diffblobblamehistory | |
| src/mainboard/asrock/e350m1/romstage.c | diffblobblamehistory |