| commit | 662c61d4497544d10c6b0d103ec7c27b5b084ee6 | |
| author | Aamir Bohra <aamir.bohra@intel.com> | |
| Fri, 16 Aug 2019 06:26:40 +0000 (16 11:56 +0530) | ||
| committer | Furquan Shaikh <furquan@google.com> | |
| Tue, 20 Aug 2019 18:05:30 +0000 (20 18:05 +0000) | ||
| tree | 4f056663fc540fe134c51c7aa012aa249cdeac1f | treesnapshot (tar.gz zip) |
| parent | c43001eb14c0a417b4c93189b19fd9cb929684bc | commitdiff |
soc/intel/cnl: Add provision to configure SD controller write protect pin
Cometlake FSP allows provison to configure SD controller WP pin, As
some of board design might choose not to use the SD WP pin from SD
card controller. This implementation adds a config that allows to
enable/disable SD controller WP pin configuration from FSP.
BUG=b:123907904
Change-Id: Ic1736a2ec4b9370d23a8e3349603eb363e6f59b9
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34900
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Cometlake FSP allows provison to configure SD controller WP pin, As
some of board design might choose not to use the SD WP pin from SD
card controller. This implementation adds a config that allows to
enable/disable SD controller WP pin configuration from FSP.
BUG=b:123907904
Change-Id: Ic1736a2ec4b9370d23a8e3349603eb363e6f59b9
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34900
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/cannonlake/chip.h | diffblobblamehistory | |
| src/soc/intel/cannonlake/fsp_params.c | diffblobblamehistory |