| commit | 62bef5a6bebbb01f00fd3f11488db749b005087e | |
| author | Matt DeVillier <matt.devillier@gmail.com> | |
| Mon, 22 Jan 2018 00:28:38 +0000 (21 18:28 -0600) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Thu, 8 Mar 2018 17:49:05 +0000 (8 17:49 +0000) | ||
| tree | f1f5bc7d8dd7b2ac2ceeb78d20a255f1ddc78a5f | treesnapshot (tar.gz zip) |
| parent | cbedd8fd2a09da5ca98b536cfa6a089555e4520d | commitdiff |
soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode
Allows eMMC in PCI mode to be seen/used by Windows.
Test: boot Windows installer on google/edgar, observe internal
eMMC storage available for installation when eMMC in PCI (vs ACPI) mode.
Change-Id: I4272c198e5e675f451a1f4de5d46e3cd96371446
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Allows eMMC in PCI mode to be seen/used by Windows.
Test: boot Windows installer on google/edgar, observe internal
eMMC storage available for installation when eMMC in PCI (vs ACPI) mode.
Change-Id: I4272c198e5e675f451a1f4de5d46e3cd96371446
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| src/soc/intel/braswell/acpi/scc.asl | diffblobblamehistory |