| commit | 606b8bccb53e5bbc840d29657faaf333eff51e38 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Mon, 24 Oct 2016 15:44:20 +0000 (24 17:44 +0200) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Wed, 26 Oct 2016 20:38:43 +0000 (26 22:38 +0200) | ||
| tree | e88c0abbdb799094a8362ac2fe5ccb3fe74bbcb2 | treesnapshot (tar.gz zip) |
| parent | 04be6b5949dae23ad989a35a2e6e6f750add6d04 | commitdiff |
nb/gm45/gma.c: Remove writes to DP, FDI registers
Those registers are only used on more recent Intel platforms featuring a
PCH. The DP registers on G4X hardware are at a different offset.
Change-Id: Ib49e54d4e7d6595dc09fb1be35ac8178b80c7f71
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17110
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Those registers are only used on more recent Intel platforms featuring a
PCH. The DP registers on G4X hardware are at a different offset.
Change-Id: Ib49e54d4e7d6595dc09fb1be35ac8178b80c7f71
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17110
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
| src/mainboard/lenovo/t400/devicetree.cb | diffblobblamehistory | |
| src/mainboard/lenovo/x200/devicetree.cb | diffblobblamehistory | |
| src/northbridge/intel/gm45/gma.c | diffblobblamehistory |