| commit | 604fe254c9c94179f36b6a801666c9dcaaf0c2aa | |
| author | Aaron Durbin <adurbin@chromium.org> | |
| Fri, 20 Mar 2015 21:47:21 +0000 (20 16:47 -0500) | ||
| committer | Aaron Durbin <adurbin@google.com> | |
| Fri, 3 Apr 2015 12:54:00 +0000 (3 14:54 +0200) | ||
| tree | 82c02a3875e12345271201a67ff0799834c1b215 | treesnapshot (tar.gz zip) |
| parent | 825a5a85b17439985610c5b2769caba6b348700a | commitdiff |
tegra132: implement platform_prog_run()
The tegra132 SoC is currently booting up on the AVP cpu which
bootstraps the rest of the SoC. Upon exiting romstage it
runs ramstage from its faster armv8 core. Instead of hard
coding the stage loading operations use run_ramstage().
Change-Id: Ib9b3eecf376ae022f910295920a085bde6e17f9f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8848
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
The tegra132 SoC is currently booting up on the AVP cpu which
bootstraps the rest of the SoC. Upon exiting romstage it
runs ramstage from its faster armv8 core. Instead of hard
coding the stage loading operations use run_ramstage().
Change-Id: Ib9b3eecf376ae022f910295920a085bde6e17f9f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8848
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
| src/soc/nvidia/tegra132/romstage.c | diffblobblamehistory |