| commit | 5b3a0ff4f1ac064b3aca61169fbb87a72d4592bd | |
| author | Meera Ravindranath <meera.ravindranath@intel.com> | |
| Wed, 23 Sep 2020 07:13:43 +0000 (23 12:43 +0530) | ||
| committer | Karthik Ramasubramanian <kramasub@google.com> | |
| Thu, 8 Oct 2020 19:11:34 +0000 (8 19:11 +0000) | ||
| tree | 0b3e4135c5afddcc8540f437bcdf847a7e7daacc | treesnapshot (tar.gz zip) |
| parent | 11bda4d41cc20b1e3f9798f0f277aaa936b4b6e0 | commitdiff |
soc/intel/jasperlake: Add VR Configuration settings
This CL fixes the CPU Throttling issue.
BUG=b:167472333
TEST=Build and boot dedede and observe the slope and offset values
getting updated in the fsp debug log
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I3fa32218040263f0abef8b9dd4c52efb31289fd7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This CL fixes the CPU Throttling issue.
BUG=b:167472333
TEST=Build and boot dedede and observe the slope and offset values
getting updated in the fsp debug log
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I3fa32218040263f0abef8b9dd4c52efb31289fd7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
| src/soc/intel/jasperlake/chip.h | diffblobblamehistory | |
| src/soc/intel/jasperlake/fsp_params.c | diffblobblamehistory |