nb/intel: Fix 16-bit read/write PCI_COMMAND register
commit5ac723e5a4a22bc9a08098cd59de5026b18d362d
authorElyes HAOUAS <ehaouas@noos.fr>
Wed, 29 Apr 2020 07:09:12 +0000 (29 09:09 +0200)
committerPatrick Georgi <pgeorgi@google.com>
Tue, 26 May 2020 15:11:33 +0000 (26 15:11 +0000)
tree1dd12f2f9c99d90dddfb08da50d7cf46264fc716
parentb30fe36734df3c48ec35438052ee8b28bf7a6a44
nb/intel: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I7c7fb10308a6fcd1ead292c53ed03ddc693f6f15
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
src/northbridge/intel/gm45/iommu.c
src/northbridge/intel/gm45/northbridge.c
src/northbridge/intel/pineview/northbridge.c
src/northbridge/intel/x4x/northbridge.c