soc/intel/alderlake: Use PMC IPC to disable HECI1
commit5a49f3aa7973cce8936bfe6600d2726904d24947
authorSubrata Banik <subratabanik@google.com>
Fri, 28 Jan 2022 18:19:31 +0000 (28 23:49 +0530)
committerSubrata Banik <subratabanik@google.com>
Wed, 2 Feb 2022 07:39:51 +0000 (2 07:39 +0000)
tree70b2ade378f5103ef4f57839a2d2bf8f362a82a9
parent7ef471c67acfc4775efbd97590b931759c478380
soc/intel/alderlake: Use PMC IPC to disable HECI1

This patch allows common CSE block to disable HECI1 device using PMC
IPC command `0xA9`.

Select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC config for
Alder Lake to disable HECI1 device using PMC IPC.

Additionally, remove dead code that deals with HECI1 disabling using
in SMM as HECI1 disabling using PMC IPC is simpler solution.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I11a677173fd6fb38f7c09594a653aeea0df1332c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
src/soc/intel/alderlake/Kconfig
src/soc/intel/alderlake/finalize.c
src/soc/intel/alderlake/smihandler.c