| commit | 57459dbeacb4759c3352206464b6c19b7add00d5 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Sun, 12 May 2019 12:11:00 +0000 (12 14:11 +0200) | ||
| committer | Patrick Rudolph <siro@das-labor.org> | |
| Tue, 14 May 2019 06:59:48 +0000 (14 06:59 +0000) | ||
| tree | 18a030d42552d34533202442c93a3ee5c71ae3cd | treesnapshot (tar.gz zip) |
| parent | 55cb5f8de53366c9df10ed9307cc9088c96191cf | commitdiff |
mb/{lenovo/x201,packardbell/ms2290}: Remove superfluous TS init
Timestamps are initialized in cpu/intel/car/romstage.c.
Change-Id: Ia2b762667be17aa5b482cd585dd6f6198cf50d9e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32758
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Timestamps are initialized in cpu/intel/car/romstage.c.
Change-Id: Ia2b762667be17aa5b482cd585dd6f6198cf50d9e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32758
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/lenovo/x201/romstage.c | diffblobblamehistory | |
| src/mainboard/packardbell/ms2290/romstage.c | diffblobblamehistory |